aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/ARMISelDAGToDAG.cpp
Commit message (Expand)AuthorAgeFilesLines
* Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} toDan Gohman2007-10-081-2/+2
* Remove clobbersPred. Add an OptionalDefOperand to instructions which have the...Evan Cheng2007-07-101-12/+14
* Unfortunately we now require C++ code to isel Bcc, conditional moves, etc.Evan Cheng2007-07-051-23/+171
* Add PredicateOperand to all ARM instructions that have the condition field.Evan Cheng2007-05-151-13/+27
* match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.llChris Lattner2007-05-031-0/+1
* Fix naming inconsistencies.Evan Cheng2007-03-191-1/+1
* Special LDR instructions to load from non-pc-relative constantpools. These areEvan Cheng2007-03-191-2/+2
* AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]Evan Cheng2007-03-131-0/+23
* Get rid of references to iostream.Evan Cheng2007-02-071-1/+0
* Select add FI, c correctly.Evan Cheng2007-02-061-1/+6
* - Store val, [sp, c] must be selected to tSTRsp.Evan Cheng2007-02-061-4/+34
* Change the operand orders to t_addrmode_s* to make it easier to morphEvan Cheng2007-01-301-15/+15
* Use PC relative ldr to load from a constantpool in Thumb mode.Evan Cheng2007-01-241-8/+17
* Allow [ fi#c, imm ] as ARM load / store addresses.Evan Cheng2007-01-241-25/+39
* Various Thumb mode load / store isel bug fixes.Evan Cheng2007-01-241-13/+38
* - Reorg Thumb load / store instructions. Combine each rr and ri pair ofEvan Cheng2007-01-231-21/+38
* ARM backend contribution from Apple.Evan Cheng2007-01-191-986/+450
* Build constants using instructions mov/orr or mvn/eor.Lauro Ramos Venancio2007-01-121-20/+74
* Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64).Lauro Ramos Venancio2007-01-041-0/+5
* implement missing comparesRafael Espindola2006-12-311-37/+66
* For PR950:Reid Spencer2006-12-311-1/+1
* fix commentRafael Espindola2006-12-291-1/+1
* Implement SELECT_CC (f32/f64) for ARM.Lauro Ramos Venancio2006-12-281-1/+3
* avoid using a constant table when a constant can be used inlineRafael Espindola2006-12-141-24/+82
* more general matching of the MVN instructionRafael Espindola2006-12-121-26/+11
* don't use "ordinary" addressing mode 1 when mvn is appropriateRafael Espindola2006-12-121-0/+2
* use MVN to handle small negative constantsRafael Espindola2006-12-121-0/+21
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-1/+0
* expand memmove and memcpyRafael Espindola2006-12-051-0/+2
* add support for the "r" asm constraintRafael Espindola2006-12-051-0/+27
* implement load effective address similar to the alpha backendRafael Espindola2006-11-091-34/+11
* Match tblegen changes.Evan Cheng2006-11-081-10/+16
* initial implementation of addressing mode 2Rafael Espindola2006-11-081-1/+31
* move ARMCondCodeToString to ARMAsmPrinter.cppRafael Espindola2006-11-021-2/+0
* All targets expand BR_JT for now.Evan Cheng2006-10-301-1/+2
* initial support for frame pointersRafael Espindola2006-10-261-0/+3
* expand ISD::VACOPYRafael Espindola2006-10-241-0/+1
* expand ISD::MEMSETRafael Espindola2006-10-231-0/+3
* For PR950:Reid Spencer2006-10-201-2/+1
* expand SIGN_EXTEND_INREGRafael Espindola2006-10-191-0/+4
* expand brind so that we don't have to implement jump tables right nowRafael Espindola2006-10-191-0/+1
* implement CallingConv::Fast as CallingConv::CRafael Espindola2006-10-181-1/+3
* expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREMRafael Espindola2006-10-171-0/+4
* initial implementation of addressing mode 5Rafael Espindola2006-10-171-0/+9
* expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTSRafael Espindola2006-10-161-4/+11
* expand ISD::BRCONDRafael Espindola2006-10-141-0/+2
* fix some fp condition codesRafael Espindola2006-10-141-32/+28
* Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.Evan Cheng2006-10-131-5/+5
* implement calls to functions that return longRafael Espindola2006-10-131-9/+16
* implement unordered floating point comparesRafael Espindola2006-10-131-27/+68
generated by cgit v1.1 at 2025-01-15 16:10:31 +0000