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lib
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Target
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ARM
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ARMISelDAGToDAG.cpp
Commit message (
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Author
Age
Files
Lines
*
Also use REG_SEQUENCE for VTBX instructions.
Bob Wilson
2010-07-07
1
-15
/
+26
*
Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be
Bob Wilson
2010-07-06
1
-1
/
+58
*
Remove an unused and a pointless variable.
Duncan Sands
2010-06-29
1
-3
/
+0
*
Eliminate unnecessary uses of getZExtValue().
Dan Gohman
2010-06-18
1
-1
/
+1
*
Remove the hidden "neon-reg-sequence" option. The reg sequences are working
Bob Wilson
2010-06-16
1
-262
/
+155
*
For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and
Bob Wilson
2010-06-04
1
-12
/
+52
*
Early implementation of tail call for ARM.
Dale Johannesen
2010-06-03
1
-0
/
+1
*
Clean up 80 column violations. No functional change.
Jim Grosbach
2010-06-02
1
-6
/
+8
*
Add the cc_out operand for t2RSBrs instructions. I missed this when I changed
Bob Wilson
2010-05-28
1
-2
/
+2
*
Fix a few places that depended on the numeric value of subreg indices.
Jakob Stoklund Olesen
2010-05-24
1
-0
/
+5
*
Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums
Jakob Stoklund Olesen
2010-05-24
1
-49
/
+49
*
Target instruction selection should copy memoperands.
Evan Cheng
2010-05-19
1
-3
/
+11
*
Turn on -neon-reg-sequence by default.
Evan Cheng
2010-05-17
1
-1
/
+2
*
Model vst lane instructions with REG_SEQUENCE.
Evan Cheng
2010-05-16
1
-7
/
+75
*
Model 128-bit vld lane with REG_SEQUENCE.
Evan Cheng
2010-05-15
1
-19
/
+44
*
Model 64-bit lane vld with REG_SEQUENCE.
Evan Cheng
2010-05-15
1
-6
/
+28
*
Model VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
Evan Cheng
2010-05-14
1
-25
/
+68
*
Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
Evan Cheng
2010-05-14
1
-16
/
+59
*
Fix comments.
Evan Cheng
2010-05-14
1
-2
/
+2
*
Model some vst3 and vst4 with reg_sequence.
Evan Cheng
2010-05-11
1
-5
/
+39
*
Model some vld3 instructions with REG_SEQUENCE.
Evan Cheng
2010-05-10
1
-1
/
+34
*
Model vld2 / vst2 with reg_sequence.
Evan Cheng
2010-05-10
1
-15
/
+84
*
Add a missing break statement to fix unintentional fall-through
Bob Wilson
2010-05-06
1
-4
/
+3
*
Fix unintentional fallthrough. Patch by Edmund Grimley-Evans <Edmund.Grimley-...
Jim Grosbach
2010-05-06
1
-1
/
+2
*
Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE.
Evan Cheng
2010-05-05
1
-1
/
+28
*
With -neon-reg-sequence, models forming a Q register from a pair of consecuti...
Evan Cheng
2010-05-04
1
-2
/
+11
*
Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield
Jim Grosbach
2010-04-22
1
-6
/
+40
*
Use const qualifiers with TargetLowering. This eliminates several
Dan Gohman
2010-04-17
1
-1
/
+0
*
Use getAL() rather than a major constant.
Evan Cheng
2010-04-16
1
-9
/
+9
*
Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle is...
Evan Cheng
2010-04-15
1
-58
/
+0
*
ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP dir...
Evan Cheng
2010-04-15
1
-1
/
+1
*
Fix VLDMQ and VSTMQ instructions to use the correct encoding and address modes.
Bob Wilson
2010-03-23
1
-0
/
+29
*
Change VST1 instructions for loading Q register values to operate on pairs
Bob Wilson
2010-03-23
1
-9
/
+21
*
Change VLD1 instructions for loading Q register values to operate on pairs
Bob Wilson
2010-03-23
1
-10
/
+21
*
Rename some VLD1/VST1 instructions to match the implementation, i.e., the
Bob Wilson
2010-03-22
1
-4
/
+4
*
Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")
Bob Wilson
2010-03-20
1
-53
/
+35
*
Rename some instructions for consistency and sanity: use "_UPD" suffix for
Bob Wilson
2010-03-20
1
-20
/
+36
*
Revert 98683. It is breaking something in the disassembler.
Bob Wilson
2010-03-16
1
-28
/
+46
*
Remove redundant writeback flag from ARM address mode 6. Also remove the
Bob Wilson
2010-03-16
1
-46
/
+28
*
Sink InstructionSelect() out of each target into SDISel, and rename it
Chris Lattner
2010-03-02
1
-7
/
+0
*
Split SelectionDAGISel::IsLegalAndProfitableToFold to
Evan Cheng
2010-02-15
1
-1
/
+3
*
move target-independent opcodes out of TargetInstrInfo
Chris Lattner
2010-02-09
1
-3
/
+3
*
Fix r93758. Use isel patterns instead of c++ selection code to select rbit an...
Evan Cheng
2010-01-19
1
-6
/
+0
*
Patch by David Conrad:
Jim Grosbach
2010-01-18
1
-0
/
+6
*
Fix an off-by-one error that caused the chain operand to be dropped from Neon
Bob Wilson
2010-01-17
1
-2
/
+2
*
Change SelectCode's argument from SDValue to SDNode *, to make it more
Dan Gohman
2010-01-05
1
-163
/
+158
*
Materialize global addresses via movt/movw pair, this is always better
Anton Korobeynikov
2009-11-24
1
-4
/
+16
*
Add predicate operand to NEON instructions. Fix lots (but not all) 80 col vio...
Evan Cheng
2009-11-21
1
-23
/
+50
*
Fix codegen of conditional move of immediates. We were not making use of the ...
Evan Cheng
2009-11-20
1
-65
/
+127
*
Refactor cmov selection code out to a separate function. No functionality cha...
Evan Cheng
2009-11-19
1
-116
/
+122
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