| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Clean up some usage of Triple. The base class has methods for determining if... | Cameron Esfahani | 2013-08-29 | 1 | -1/+1 |
| * | ARM: Use "dmb sy" for barriers on M-class CPUs | Tim Northover | 2013-08-28 | 1 | -1/+4 |
| * | [ARMv8] Add CodeGen for VMAXNM/VMINNM. | Joey Gouly | 2013-08-23 | 1 | -0/+16 |
| * | [ARMv8] Add CodeGen support for VSEL. | Joey Gouly | 2013-08-22 | 1 | -1/+93 |
| * | [ARM] Constrain some register classes in EmitAtomicBinary64 so that | Joey Gouly | 2013-08-22 | 1 | -0/+4 |
| * | ARM: implement some simple f64 materializations. | Tim Northover | 2013-08-20 | 1 | -10/+40 |
| * | ARM: implement allowTruncateForTailCall | Tim Northover | 2013-08-06 | 1 | -0/+15 |
| * | [ARM] check bitwidth in PerformORCombine | Saleem Abdulrasool | 2013-07-30 | 1 | -14/+21 |
| * | [ARM][ISel] Improve the lowering of vector loads. | Quentin Colombet | 2013-07-23 | 1 | -1/+3 |
| * | ARM: allow printing of ARM atomic DAG nodes. | Tim Northover | 2013-07-16 | 1 | -0/+13 |
| * | ARM: implement ldrex, strex and clrex intrinsics | Tim Northover | 2013-07-16 | 1 | -0/+24 |
| * | ARM EABI divmod support | Renato Golin | 2013-07-16 | 1 | -2/+78 |
| * | Use llvm::array_lengthof to replace sizeof(array)/sizeof(array[0]). | Craig Topper | 2013-07-15 | 1 | -1/+1 |
| * | Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s... | Craig Topper | 2013-07-14 | 1 | -5/+5 |
| * | ARM: Improve codegen for generic vselect. | Jim Grosbach | 2013-07-08 | 1 | -0/+18 |
| * | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -2/+0 |
| * | Revert r185595-185596 which broke buildbots. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -0/+2 |
| * | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-03 | 1 | -2/+0 |
| * | [ARM] Improve the instruction selection of vector loads. | Quentin Colombet | 2013-07-03 | 1 | -0/+94 |
| * | ARM: relax the atomic release barrier to "dmb ishst" on Swift | Tim Northover | 2013-07-03 | 1 | -1/+11 |
| * | Revert r185339 (ARM: relax the atomic release barrier to "dmb ishst") | Tim Northover | 2013-07-01 | 1 | -5/+1 |
| * | ARM: relax the atomic release barrier to "dmb ishst" | Tim Northover | 2013-07-01 | 1 | -1/+5 |
| * | ARM: ensure fixed-point conversions have sane types | Tim Northover | 2013-06-28 | 1 | -5/+36 |
| * | ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is n... | Stephen Lin | 2013-06-26 | 1 | -3/+10 |
| * | The getRegForInlineAsmConstraint function should only accept MVT value types. | Chad Rosier | 2013-06-22 | 1 | -1/+1 |
| * | [ARMTargetLowering] ARMISD::{SUB,ADD}{C,E} second result is a boolean implyin... | Michael Gottesman | 2013-06-18 | 1 | -1/+11 |
| * | Converted an overly aggressive assert to a conditional check in AddCombineTo6... | Michael Gottesman | 2013-06-18 | 1 | -2/+5 |
| * | Order CALLSEQ_START and CALLSEQ_END nodes. | Andrew Trick | 2013-05-29 | 1 | -2/+3 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 | 1 | -115/+115 |
| * | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer | 2013-05-24 | 1 | -7/+7 |
| * | ARM: implement @llvm.readcyclecounter intrinsic | Tim Northover | 2013-05-23 | 1 | -1/+43 |
| * | PR15868 fix. | Stepan Dyatkovskiy | 2013-05-20 | 1 | -6/+43 |
| * | Replace some bit operations with simpler ones. No functionality change. | Benjamin Kramer | 2013-05-19 | 1 | -9/+7 |
| * | Add LLVMContext argument to getSetCCResultType | Matt Arsenault | 2013-05-18 | 1 | -1/+1 |
| * | ARM ISel: Don't create illegal types during LowerMUL | Arnold Schwaighofer | 2013-05-14 | 1 | -25/+32 |
| * | Correctly preserve the input chain for potential tailcall nodes whose | Lang Hames | 2013-05-13 | 1 | -1/+1 |
| * | For r181148: fixed warning 'enumeral and non-enumeral type in conditional exp... | Stepan Dyatkovskiy | 2013-05-08 | 1 | -1/+1 |
| * | For ARM backend, fixed "byval" attribute support. | Stepan Dyatkovskiy | 2013-05-05 | 1 | -33/+102 |
| * | Refactoring patch. | Stepan Dyatkovskiy | 2013-04-30 | 1 | -41/+70 |
| * | Add more tests for r179925 to verify correct handling of signext/zeroext; str... | Stephen Lin | 2013-04-23 | 1 | -3/+6 |
| * | Lowercase "is" boolean variable prefix for consistency within function, no fu... | Stephen Lin | 2013-04-23 | 1 | -12/+12 |
| * | Fix for 5.5 Parameter Passing --> Stage C: | Stepan Dyatkovskiy | 2013-04-22 | 1 | -0/+1 |
| * | Remove unused ShouldFoldAtomicFences flag. | Tim Northover | 2013-04-20 | 1 | -2/+0 |
| * | Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE. | Tim Northover | 2013-04-20 | 1 | -32/+0 |
| * | Add CodeGen support for functions that always return arguments via a new para... | Stephen Lin | 2013-04-20 | 1 | -5/+28 |
| * | Test commit | Stephen Lin | 2013-04-20 | 1 | -1/+1 |
| * | Remove the old CodePlacementOpt pass. | Benjamin Kramer | 2013-03-29 | 1 | -2/+0 |
| * | Improve long vector sext/zext lowering on ARM | Renato Golin | 2013-03-19 | 1 | -0/+55 |
| * | ARM: Creating a vector from a lane of another. | Jim Grosbach | 2013-03-02 | 1 | -2/+5 |
| * | Clean up code format a bit. | Jim Grosbach | 2013-03-02 | 1 | -4/+2 |
