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path: root/lib/Target/ARM/ARMISelLowering.cpp
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* Test commit. Fixed typo.David Peixotto2013-02-131-1/+1
* ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer2013-02-121-1/+37
* Move MRI liveouts to ARM return instructions.Jakob Stoklund Olesen2013-02-051-13/+11
* Add a special ARM trap encoding for NaCl.Eli Bendersky2013-01-301-2/+10
* Fix 64-bit atomic operations in Thumb mode.Tim Northover2013-01-291-74/+46
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-291-0/+2
* Fixed the condition codes for the atomic64 min/umin code generation on ARM. I...Silviu Baranga2013-01-251-2/+2
* Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth2013-01-071-32/+0
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-8/+8
* Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling2012-12-301-5/+7
* Revert "Adding support for llvm.arm.neon.vaddl[su].* and"Bob Wilson2012-12-201-18/+0
* Adding support for llvm.arm.neon.vaddl[su].* andRenato Golin2012-12-201-0/+18
* Remove the explicit MachineInstrBuilder(MI) constructor.Jakob Stoklund Olesen2012-12-191-1/+1
* Change TargetLowering::findRepresentativeClass to take an MVT, insteadPatrik Hagglund2012-12-191-2/+2
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...Bill Wendling2012-12-191-3/+3
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-131-1/+1
* Sorry about the churn. One more change to getOptimalMemOpType() hook. Did IEvan Cheng2012-12-121-2/+2
* - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.Evan Cheng2012-12-121-6/+2
* Avoid using lossy load / stores for memcpy / memset expansion. e.g.Evan Cheng2012-12-121-0/+4
* Replace TargetLowering::isIntImmLegal() withEvan Cheng2012-12-111-18/+33
* Revert EVT->MVT changes, r169836-169851, due to buildbot failures.Patrik Hagglund2012-12-111-3/+3
* Change TargetLowering::findRepresentativeClass to take an MVT, insteadPatrik Hagglund2012-12-111-2/+2
* Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.Patrik Hagglund2012-12-111-1/+1
* Stylistic tweak.Evan Cheng2012-12-111-9/+8
* Some enhancements for memcpy / memset inline expansion.Evan Cheng2012-12-101-13/+51
* Replace r169459 with something safer. Rather than having computeMaskedBits toEvan Cheng2012-12-061-30/+21
* Let targets provide hooks that compute known zero and ones for any_extendEvan Cheng2012-12-061-0/+30
* Appease GCC's -Wparentheses.Matt Beaumont-Gay2012-12-041-2/+2
* ARM custom lower ctpop for vector types. Patch by Pete Couperus.Evan Cheng2012-12-041-0/+117
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-10/+10
* Codegen failure for vmull with small vectorsSebastian Pop2012-11-301-13/+74
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-291-10/+73
* ARM: Implement CanLowerReturn so large vectors get expanded into sret.Benjamin Kramer2012-11-281-0/+11
* Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete C...Eli Friedman2012-11-171-0/+1
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-11/+47
* Make sure FABS on v2f32 and v4f32 is legal on ARM NEONAnton Korobeynikov2012-11-161-1/+0
* Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman2012-11-151-0/+2
* Revert changing FNEG of v4f32 to Expand. It's legal.Craig Topper2012-11-151-1/+0
* Make FNEG and FABS of v4f32 Expand.Craig Topper2012-11-151-0/+2
* Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.Craig Topper2012-11-151-0/+4
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-101-8/+2
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-091-2/+1
* Add support for -mstrict-align compiler option for ARM targets.Chad Rosier2012-11-091-1/+2
* Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier2012-11-061-8/+9
* Vext Lowering was missing opportunitiesQuentin Colombet2012-11-021-4/+40
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-301-4/+4
* [code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet2012-10-271-2/+8
* ARM:Stepan Dyatkovskiy2012-10-191-11/+18
* Issue:Stepan Dyatkovskiy2012-10-161-10/+19
* Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga2012-10-151-2/+19