| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Enable sibling call optimization of libcalls which are expanded during | Evan Cheng | 2010-11-30 | 1 | -0/+2 |
| * | Add support for NEON VLD2-dup instructions. | Bob Wilson | 2010-11-28 | 1 | -1/+6 |
| * | Add support for ARM's specialized vector-compare-against-zero instructions. | Owen Anderson | 2010-11-08 | 1 | -0/+5 |
| * | Disallow the certain NEON modified-immediate forms when generating vorr or vbic. | Owen Anderson | 2010-11-05 | 1 | -0/+7 |
| * | Add codegen and encoding support for the immediate form of vbic. | Owen Anderson | 2010-11-05 | 1 | -1/+3 |
| * | Add support for code generation of the one register with immediate form of vorr. | Owen Anderson | 2010-11-03 | 1 | -1/+4 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 | 1 | -0/+2 |
| * | Overhaul memory barriers in the ARM backend. Radar 8601999. | Bob Wilson | 2010-10-30 | 1 | -2/+2 |
| * | Inline asm multiple alternative constraints development phase 2 - improved ba... | John Thompson | 2010-10-29 | 1 | -0/+6 |
| * | Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any | Jim Grosbach | 2010-10-19 | 1 | -2/+4 |
| * | Remove unused ARMISD::AND selection DAG node. | Bob Wilson | 2010-10-15 | 1 | -2/+0 |
| * | Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load | Bob Wilson | 2010-09-21 | 1 | -0/+3 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 | 1 | -0/+2 |
| * | Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, | Bob Wilson | 2010-09-01 | 1 | -0/+4 |
| * | Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, but | Bill Wendling | 2010-08-29 | 1 | -0/+2 |
| * | Consider this code snippet: | Bill Wendling | 2010-08-11 | 1 | -0/+1 |
| * | Add support for getting & setting the FPSCR application register on ARM when ... | Nate Begeman | 2010-08-03 | 1 | -1/+2 |
| * | Remove dead prototype | Jim Grosbach | 2010-07-28 | 1 | -1/+0 |
| * | Hook in GlobalMerge pass | Anton Korobeynikov | 2010-07-24 | 1 | -0/+4 |
| * | - Allow target to specify when is register pressure "too high". In most cases, | Evan Cheng | 2010-07-23 | 1 | -0/+6 |
| * | Baby steps towards ARM fast-isel. | Eric Christopher | 2010-07-21 | 1 | -0/+9 |
| * | Teach bottom up pre-ra scheduler to track register pressure. Work in progress. | Evan Cheng | 2010-07-21 | 1 | -2/+2 |
| * | ARM has to provide its own TargetLowering::findRepresentativeClass because it... | Evan Cheng | 2010-07-19 | 1 | -0/+4 |
| * | Since ARM emits inline jump tables as part of the ConstantIsland pass, | Jim Grosbach | 2010-07-19 | 1 | -0/+2 |
| * | revert so I can get the right PR# in the log message. | Jim Grosbach | 2010-07-19 | 1 | -2/+0 |
| * | Since ARM emits inline jump tables as part of the ConstantIsland pass, | Jim Grosbach | 2010-07-19 | 1 | -0/+2 |
| * | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach | 2010-07-16 | 1 | -1/+5 |
| * | Add support for NEON VMVN immediate instructions. | Bob Wilson | 2010-07-14 | 1 | -1/+4 |
| * | Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent | Bob Wilson | 2010-07-13 | 1 | -7/+1 |
| * | Extend the r107852 optimization which turns some fp compare to code sequence ... | Evan Cheng | 2010-07-13 | 1 | -3/+7 |
| * | Optimize some vfp comparisons to integer ones. This patch implements the simp... | Evan Cheng | 2010-07-08 | 1 | -0/+3 |
| * | Split the SDValue out of OutputArg so that SelectionDAG-independent | Dan Gohman | 2010-07-07 | 1 | -0/+3 |
| * | The hasMemory argument is irrelevant to how the argument | Dale Johannesen | 2010-06-25 | 1 | -1/+0 |
| * | Add basic support for NEON modified immediates besides VMOV. | Bob Wilson | 2010-06-15 | 1 | -1/+2 |
| * | Rename functions referring to VMOV immediates to refer to NEON "modified | Bob Wilson | 2010-06-14 | 1 | -5/+5 |
| * | For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and | Bob Wilson | 2010-06-04 | 1 | -0/+7 |
| * | Early implementation of tail call for ARM. | Dale Johannesen | 2010-06-03 | 1 | -0/+13 |
| * | Clean up 80 column violations. No functional change. | Jim Grosbach | 2010-06-02 | 1 | -4/+5 |
| * | back out 104862/104869. Can reuse stacksave after all. Very cool. | Jim Grosbach | 2010-05-27 | 1 | -1/+0 |
| * | add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EH | Jim Grosbach | 2010-05-27 | 1 | -0/+1 |
| * | Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in | Jim Grosbach | 2010-05-26 | 1 | -0/+1 |
| * | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng | 2010-05-22 | 1 | -0/+1 |
| * | Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. | Jim Grosbach | 2010-05-22 | 1 | -1/+1 |
| * | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng | 2010-05-20 | 1 | -0/+2 |
| * | Allow TargetLowering::getRegClassFor() to be called on illegal types. Also | Evan Cheng | 2010-05-15 | 1 | -0/+4 |
| * | Implement a bunch more TargetSelectionDAGInfo infrastructure. | Dan Gohman | 2010-05-11 | 1 | -9/+0 |
| * | Remove the TargetLowering::getSubtarget() virtual function, which | Dan Gohman | 2010-05-11 | 1 | -1/+1 |
| * | Get rid of the EdgeMapping map. Instead, just check for BasicBlock | Dan Gohman | 2010-05-01 | 1 | -3/+3 |
| * | Use const qualifiers with TargetLowering. This eliminates several | Dan Gohman | 2010-04-17 | 1 | -29/+32 |
| * | Move per-function state out of TargetLowering subclasses and into | Dan Gohman | 2010-04-17 | 1 | -1/+0 |
