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path: root/lib/Target/ARM/ARMInstrInfo.cpp
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* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-3/+3
* Add lengthof and endof templates that hide a lot of sizeof computations.Owen Anderson2007-09-071-1/+2
* ARM: make branch folder remove unconditional branchesDale Johannesen2007-07-121-2/+13
* Remove clobbersPred. Add an OptionalDefOperand to instructions which have the...Evan Cheng2007-07-101-5/+29
* Incorrect check.Evan Cheng2007-07-061-4/+2
* Reflects the chanegs made to PredicateOperand.Evan Cheng2007-07-051-4/+10
* Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman2007-06-261-14/+0
* Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman2007-06-191-0/+14
* Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng2007-06-191-29/+0
* Instructions with unique labels or embedded jumptables cannot be duplicated d...Evan Cheng2007-06-151-0/+29
* Handle blocks with 2 unconditional branches in AnalyzeBranch.Dale Johannesen2007-06-131-0/+10
* Add a utility routine to check for unpredicated terminator instruction.Evan Cheng2007-06-081-3/+3
* Fix ARM condition code subsumission check.Evan Cheng2007-06-081-3/+3
* Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compila...Evan Cheng2007-06-071-1/+1
* Add missing const qualifiers.Evan Cheng2007-05-291-9/+11
* Hooks for predication support.Evan Cheng2007-05-231-8/+33
* Fix some -march=thumb regressions. tBR_JTr is not predicable.Evan Cheng2007-05-211-1/+3
* BlockHasNoFallThrough() now returns true if block ends with a return instruct...Evan Cheng2007-05-211-2/+13
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ...Evan Cheng2007-05-181-7/+9
* PredicateInstruction returns true if the operation was successful.Evan Cheng2007-05-161-3/+7
* Removed isPredicable().Evan Cheng2007-05-161-9/+0
* Hooks for predication support.Evan Cheng2007-05-161-0/+22
* Add PredicateOperand to all ARM instructions that have the condition field.Evan Cheng2007-05-151-16/+21
* Rewrite of Thumb constant islands handling (exact allowance for paddingDale Johannesen2007-04-291-3/+4
* Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng2007-04-261-1/+1
* Relex assertions to account for additional implicit def / use operands.Evan Cheng2007-04-251-1/+1
* Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov2007-04-161-2/+2
* Inverted logic.Evan Cheng2007-04-031-1/+1
* findRegisterUseOperand() changed.Evan Cheng2007-03-261-2/+2
* Fix naming inconsistencies.Evan Cheng2007-03-191-2/+2
* Spill / restore should avoid modifying the condition register.Evan Cheng2007-02-071-2/+2
* Copy and paste bug.Evan Cheng2007-01-301-1/+11
* Misseed thumb jumptable branch.Evan Cheng2007-01-301-0/+1
* Factor GetInstSize() out of constpool island pass.Evan Cheng2007-01-291-1/+70
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-4/+0
* ARM backend contribution from Apple.Evan Cheng2007-01-191-21/+384
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-2/+3
* fix warning about missing newline at end of fileRafael Espindola2006-10-241-1/+1
* implement uncond branch insertion, mark branches with isBranch.Chris Lattner2006-10-241-0/+8
* add shifts to addressing mode 1Rafael Espindola2006-09-131-3/+6
* partial implementation of the ARM Addressing Mode 1Rafael Espindola2006-09-111-7/+7
* change the addressing mode of the str instruction to reg+immRafael Espindola2006-08-081-0/+4
* create the raddr addressing mode that matches any register and the frame indexRafael Espindola2006-07-101-22/+0
* handle the "mov reg1, reg2" case in isMoveInstrRafael Espindola2006-06-271-1/+13
* implement minimal versions ofRafael Espindola2006-05-231-5/+0
* added a skeleton of the ARM backendRafael Espindola2006-05-141-0/+58
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