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path: root/lib/Target/ARM/ARMInstrInfo.h
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* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-161-5/+5
* need ARM.h for ARMCC definitionJim Grosbach2008-10-071-0/+1
* Encode the conditional execution predicate when JITing.Jim Grosbach2008-10-071-0/+6
* Revert 56176. All those instruction formats are still needed.Evan Cheng2008-09-131-7/+23
* Eliminate unnecessary instruction formats.Evan Cheng2008-09-121-23/+7
* Rewrite address mode 1 code emission routines.Evan Cheng2008-09-121-0/+1
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ...Owen Anderson2008-08-261-1/+1
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change h...Owen Anderson2008-08-141-6/+7
* Make LiveVariables even more optional, by making it optional in the call to T...Owen Anderson2008-07-021-1/+1
* Change target-specific classes to use more precise static types.Dan Gohman2008-05-141-1/+1
* Infrastructure for getting the machine code size of a function and an instruc...Nicolas Geoffray2008-04-161-10/+4
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-0/+3
* Add explicit keywords.Dan Gohman2008-03-251-1/+1
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
* It's not always safe to fold movsd into xorpd, etc. Check the alignment of th...Evan Cheng2008-02-081-2/+4
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-0/+14
* Move some more functionality from MRegisterInfo to TargetInstrInfo.Owen Anderson2008-01-041-0/+6
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-0/+19
* Fix a problem where lib/Target/TargetInstrInfo.h would include and useChris Lattner2008-01-011-1/+1
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-0/+5
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+1
* Fix a misnamed parameter.Christopher Lamb2007-10-181-1/+1
* Instruction formats added used to generate multiply instructions of V5TE.Raul Herbster2007-08-301-39/+52
* Initial JIT support for ARM by Raul Fernandes Herbster.Evan Cheng2007-08-071-1/+49
* Remove clobbersPred. Add an OptionalDefOperand to instructions which have the...Evan Cheng2007-07-101-0/+3
* Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman2007-06-261-1/+0
* Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman2007-06-191-0/+1
* Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng2007-06-191-2/+0
* Instructions with unique labels or embedded jumptables cannot be duplicated d...Evan Cheng2007-06-151-0/+2
* Add missing const qualifiers.Evan Cheng2007-05-291-5/+7
* Hooks for predication support.Evan Cheng2007-05-231-1/+6
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ...Evan Cheng2007-05-181-4/+4
* PredicateInstruction returns true if the operation was successful.Evan Cheng2007-05-161-1/+1
* Removed isPredicable().Evan Cheng2007-05-161-1/+0
* Hooks for predication support.Evan Cheng2007-05-161-0/+5
* Factor GetInstSize() out of constpool island pass.Evan Cheng2007-01-291-0/+10
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-5/+0
* ARM backend contribution from Apple.Evan Cheng2007-01-191-2/+65
* implement uncond branch insertion, mark branches with isBranch.Chris Lattner2006-10-241-0/+4
* change the addressing mode of the str instruction to reg+immRafael Espindola2006-08-081-0/+4
* create the raddr addressing mode that matches any register and the frame indexRafael Espindola2006-07-101-14/+0
* added a skeleton of the ARM backendRafael Espindola2006-05-141-0/+57
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