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path: root/lib/Target/ARM/ARMInstrInfo.td
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* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-161-17/+11
* Improve 64-subtraction of immediates when parts of the immediate can fitJim Grosbach2010-07-141-5/+11
* Extend the r107852 optimization which turns some fp compare to code sequence ...Evan Cheng2010-07-131-0/+25
* Changes to ARM tail calls, mostly cosmetic.Dale Johannesen2010-07-081-0/+4
* LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want itJim Grosbach2010-06-211-1/+1
* Fix PR 7433. Silly typo in non-Darwin ARM tail callDale Johannesen2010-06-211-2/+2
* Indentation and remove dead code.Evan Cheng2010-06-191-58/+44
* Fix ARM/Thumb reversal in previous attempt.Dale Johannesen2010-06-181-2/+2
* An attempt to fix the problem Anton reported withDale Johannesen2010-06-181-1/+5
* Last round of changes for ARM tail calls.Dale Johannesen2010-06-181-2/+2
* Add file missing from previous commit.Dale Johannesen2010-06-151-6/+14
* Early implementation of tail call for ARM.Dale Johannesen2010-06-031-0/+97
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-10/+10
* correct retattrJim Grosbach2010-05-281-2/+2
* make sure accesses to set up the jmpbuf don't get moved after it by the sched...Jim Grosbach2010-05-281-4/+5
* Update the saved stack pointer in the sjlj function context following eitherJim Grosbach2010-05-271-4/+2
* Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry inJim Grosbach2010-05-261-1/+2
* Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach2010-05-221-0/+17
* Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable.Evan Cheng2010-05-191-12/+4
* Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ...Evan Cheng2010-05-191-8/+9
* Mark a few more pattern-less instructions with neverHasSideEffects. This is e...Evan Cheng2010-05-191-0/+4
* Chris said that the comment char should be escaped. Fix all the occurences of...Anton Korobeynikov2010-05-161-7/+7
* "trap" pseudo-op turned out to be apple-local.Anton Korobeynikov2010-05-151-1/+4
* Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction.Evan Cheng2010-05-111-2/+2
* Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/packJim Grosbach2010-05-051-3/+2
* Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch byJim Grosbach2010-05-051-0/+3
* Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen2010-04-161-4/+4
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-151-1/+1
* Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargetsBob Wilson2010-04-091-1/+18
* Make the use of the vmla and vmls VFP instructions controllable via cmd line.Jim Grosbach2010-03-241-0/+2
* Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")Bob Wilson2010-03-201-3/+8
* Revert r98679. The disassembler will be updated to depend on the existence ofJohnny Chen2010-03-191-6/+2
* Revert this change, since it was causing ARM performance regressions.Bob Wilson2010-03-191-1/+0
* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-191-3/+6
* Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov2010-03-181-0/+1
* Revert 98683. It is breaking something in the disassembler.Bob Wilson2010-03-161-2/+2
* Remove redundant writeback flag from ARM address mode 6. Also remove theBob Wilson2010-03-161-2/+2
* Disambiguate the *_UPD and * variants by specifying the writeback flag as 1.Johnny Chen2010-03-161-2/+6
* Remove the writeback flag from ARM's address mode 4. Now that we have separateBob Wilson2010-03-161-3/+3
* Attempt to appease the arm-linux buildbot by fixing the JIT encodings for newBob Wilson2010-03-131-5/+7
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-131-17/+30
* Factored out the disassembly printing of CPS option, MSR mask, and Negative ZeroJohnny Chen2010-03-101-10/+13
* MSR (Move to Special Register from ARM core register) requires a mask to specifyJohnny Chen2010-03-091-8/+8
* fix a bunch of partially ambiguous patterns on ARM. As anChris Lattner2010-03-081-1/+1
* Initial bits of ARMv4-only support.Anton Korobeynikov2010-03-061-9/+60
* Change some asm shift opcode strings to lowercase.Johnny Chen2010-03-021-6/+6
* Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the WJohnny Chen2010-03-011-1/+9
* The mayHaveSideEffects flag is no longer used.Dan Gohman2010-02-271-3/+2
* Added the follwoing 32-bit Thumb instructions for disassembly only:Johnny Chen2010-02-261-2/+2
* Updated version of r96634 (which was reverted due to failing 176.gcc andJim Grosbach2010-02-221-1/+4
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