| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Reapply r128946 (pseudoization of various instructions), and fix the extra im... | Owen Anderson | 2011-04-05 | 1 | -64/+21 |
| * | Revert r128946 while I figure out why it broke the buildbots. | Owen Anderson | 2011-04-05 | 1 | -17/+63 |
| * | Give RSBS and RSCS the pseudo treatment. | Owen Anderson | 2011-04-05 | 1 | -63/+17 |
| * | Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doi... | Owen Anderson | 2011-04-05 | 1 | -6/+7 |
| * | Make second source operand of LDRD pre/post explicit. | Jim Grosbach | 2011-04-05 | 1 | -3/+26 |
| * | Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/... | Owen Anderson | 2011-04-05 | 1 | -41/+9 |
| * | Revamp the SjLj "dispatch setup" intrinsic. | Bill Wendling | 2011-04-05 | 1 | -3/+3 |
| * | Fix SRS/SRSW encoding bits. | Johnny Chen | 2011-04-05 | 1 | -0/+4 |
| * | A8.6.105 MUL | Johnny Chen | 2011-04-04 | 1 | -1/+3 |
| * | RFE encoding should also specify the "should be" encoding bits. | Johnny Chen | 2011-04-04 | 1 | -23/+30 |
| * | - Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT | Bruno Cardoso Lopes | 2011-04-04 | 1 | -21/+24 |
| * | Fixed MOVr for "should be" encoding bits for Inst{19-16} = 0b0000. | Johnny Chen | 2011-04-01 | 1 | -0/+1 |
| * | MOVs should have Inst{19-16} as 0b0000, otherwise, the instruction is UNPREDI... | Johnny Chen | 2011-04-01 | 1 | -0/+1 |
| * | Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definiti... | Johnny Chen | 2011-04-01 | 1 | -0/+3 |
| * | LDRD/STRD instructions should print both Rt and Rt2 in the asm string. | Jim Grosbach | 2011-04-01 | 1 | -10/+5 |
| * | Apply again changes to support ARM memory asm parsing. I removed | Bruno Cardoso Lopes | 2011-03-31 | 1 | -27/+54 |
| * | Fix single word and unsigned byte data transfer instruction encodings so that | Johnny Chen | 2011-03-31 | 1 | -0/+2 |
| * | Add BLXi to the instruction table for disassembly purpose. | Johnny Chen | 2011-03-31 | 1 | -0/+10 |
| * | Revert r128632 again, until I figure out what break the tests | Bruno Cardoso Lopes | 2011-03-31 | 1 | -59/+32 |
| * | Reapply r128585 without generating a lib depedency cycle. An updated log: | Bruno Cardoso Lopes | 2011-03-31 | 1 | -32/+59 |
| * | Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and" | Matt Beaumont-Gay | 2011-03-31 | 1 | -46/+19 |
| * | - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and | Bruno Cardoso Lopes | 2011-03-30 | 1 | -19/+46 |
| * | A8.6.188 STC, STC2 | Johnny Chen | 2011-03-29 | 1 | -3/+3 |
| * | Add asm parsing support w/ testcases for strex/ldrex family of instructions | Bruno Cardoso Lopes | 2011-03-24 | 1 | -29/+31 |
| * | ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder wa... | Johnny Chen | 2011-03-24 | 1 | -1/+1 |
| * | STRT and STRBT was incorrectly tagged as IndexModeNone during the refactoring... | Johnny Chen | 2011-03-24 | 1 | -2/+2 |
| * | LDRT and LDRBT was incorrectly tagged as IndexModeNone during the refactoring... | Johnny Chen | 2011-03-22 | 1 | -2/+2 |
| * | Change MRC and MRC2 instructions to model the output register properly | Bruno Cardoso Lopes | 2011-03-22 | 1 | -12/+21 |
| * | Add support to the ARM asm parser for the register-shifted-register forms of ... | Owen Anderson | 2011-03-18 | 1 | -2/+8 |
| * | Match a few more obvious patterns to revsh. rdar://9147637. | Evan Cheng | 2011-03-18 | 1 | -1/+9 |
| * | Clean whitespace. | Owen Anderson | 2011-03-18 | 1 | -8/+8 |
| * | Add "swi" which is an obsolete mnemonic for "svc". | Nick Lewycky | 2011-03-17 | 1 | -0/+1 |
| * | Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches. | Jim Grosbach | 2011-03-15 | 1 | -27/+22 |
| * | Add FIXME. | Jim Grosbach | 2011-03-12 | 1 | -0/+3 |
| * | Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the same | Jim Grosbach | 2011-03-12 | 1 | -27/+13 |
| * | Add a FIXME. | Jim Grosbach | 2011-03-11 | 1 | -0/+2 |
| * | Pseudo-ize the ARM 'B' instruction. | Jim Grosbach | 2011-03-11 | 1 | -7/+3 |
| * | Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side- | Jim Grosbach | 2011-03-11 | 1 | -10/+4 |
| * | This FIXME has been fixed. | Jim Grosbach | 2011-03-11 | 1 | -3/+0 |
| * | Properly pseudo-ize ARM MVNCCi. | Jim Grosbach | 2011-03-11 | 1 | -12/+4 |
| * | Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4). | Jim Grosbach | 2011-03-11 | 1 | -3/+3 |
| * | Properly pseudo-ize ARM MOVCCi and MOVCCi16. | Jim Grosbach | 2011-03-11 | 1 | -26/+9 |
| * | Properly pseudo-ize MOVCCr and MOVCCs. | Jim Grosbach | 2011-03-10 | 1 | -26/+9 |
| * | DMB can just be a pat referencing MCR. | Jim Grosbach | 2011-03-10 | 1 | -7/+6 |
| * | Reorganize a bit. No functional change, just moving patterns up. | Jim Grosbach | 2011-03-10 | 1 | -232/+233 |
| * | Remove unused conditional negate operations. | Bob Wilson | 2011-03-05 | 1 | -2/+0 |
| * | pr9367: Add missing predicated BLX instructions. | Bob Wilson | 2011-03-03 | 1 | -1/+19 |
| * | Fixes an assertion failure while disassembling ARM rsbs reg/reg form. | Kevin Enderby | 2011-03-02 | 1 | -0/+13 |
| * | Add patterns to use post-increment addressing for Neon VST1-lane instructions. | Bob Wilson | 2011-02-25 | 1 | -1/+3 |
| * | Add assembly parsing support for "msr" and also fix its encoding. Also add | Bruno Cardoso Lopes | 2011-02-18 | 1 | -21/+29 |
