| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Fix encoding and add parsing support for the arm/thumb CPS instruction: | Bruno Cardoso Lopes | 2011-02-14 | 1 | -13/+29 |
| * | AsmMatcher custom operand parser failure enhancements. | Jim Grosbach | 2011-02-12 | 1 | -2/+2 |
| * | Add support for parsing dmb/dsb instructions | Bruno Cardoso Lopes | 2011-02-07 | 1 | -0/+1 |
| * | Remove the MCR asm parser hack and start using the custom target specific asm | Bruno Cardoso Lopes | 2011-02-07 | 1 | -0/+14 |
| * | Fix a comment: addrmode6 no longer includes the optional writeback flag. | Bob Wilson | 2011-02-07 | 1 | -1/+1 |
| * | Remove inaccurate comments: so_imm and t2_so_imm operands are not encoded | Bob Wilson | 2011-02-07 | 1 | -4/+1 |
| * | Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. | Jason W Kim | 2011-02-04 | 1 | -3/+19 |
| * | Fix PLD encoding. | Evan Cheng | 2011-01-27 | 1 | -2/+2 |
| * | Last round of fixes for movw + movt global address codegen. | Evan Cheng | 2011-01-21 | 1 | -9/+15 |
| * | Fix the encoding of QADD/SUB, QDADD/SUB. While qadd16, qadd8 use "rd, rn, rm", | Bruno Cardoso Lopes | 2011-01-21 | 1 | -8/+12 |
| * | - Use a more appropriate name for Owen's ARM Parser isMCR hack since the same... | Bruno Cardoso Lopes | 2011-01-20 | 1 | -9/+35 |
| * | Refactor mcr* and mr*c instructions into classes with the same encoding. No f... | Bruno Cardoso Lopes | 2011-01-20 | 1 | -108/+46 |
| * | Sorry, several patches in one. | Evan Cheng | 2011-01-20 | 1 | -6/+17 |
| * | Fix the encoding of mrrc and mcrr family of instructions. Also add testcases ... | Bruno Cardoso Lopes | 2011-01-19 | 1 | -16/+16 |
| * | Don't forget to emit the load from indirect symbol when using movw + movt to ... | Evan Cheng | 2011-01-19 | 1 | -2/+2 |
| * | Fix MRS encoding for arm and thumb. | Bruno Cardoso Lopes | 2011-01-18 | 1 | -4/+8 |
| * | Add support for parsing and encoding ARM's official syntax for the BFI instru... | Bruno Cardoso Lopes | 2011-01-18 | 1 | -0/+31 |
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 | 1 | -2/+17 |
| * | Provide instruction sizes for ARMv5 variants of MUL instructions. | Anton Korobeynikov | 2011-01-16 | 1 | -29/+30 |
| * | 80-col. | Eric Christopher | 2011-01-15 | 1 | -2/+4 |
| * | Add support to the ARM MC infrastructure to support mcr and friends. This req... | Owen Anderson | 2011-01-13 | 1 | -24/+136 |
| * | Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step | Evan Cheng | 2011-01-13 | 1 | -6/+6 |
| * | ARM/MC: Mark several '...S' instructions as codegen only, they aren't real | Daniel Dunbar | 2011-01-10 | 1 | -4/+6 |
| * | Fix comment typo. | Bob Wilson | 2011-01-06 | 1 | -1/+1 |
| * | Model operand restrictions of mul-like instructions on ARMv5 via | Anton Korobeynikov | 2011-01-01 | 1 | -8/+57 |
| * | Remove dead patterns. | Jim Grosbach | 2010-12-23 | 1 | -26/+0 |
| * | Flag -> Glue, the ongoing saga | Chris Lattner | 2010-12-23 | 1 | -15/+15 |
| * | Add Neon VCVT instructions for f32 <-> f16 conversions. | Bob Wilson | 2010-12-15 | 1 | -0/+1 |
| * | In Thumb2, direct branches can be encoded as either a "short" conditional bra... | Owen Anderson | 2010-12-13 | 1 | -0/+4 |
| * | (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == ... | Evan Cheng | 2010-12-11 | 1 | -10/+10 |
| * | More trivial cleanup. No need to define the EncoderMethod property type. Can | Jim Grosbach | 2010-12-10 | 1 | -2/+2 |
| * | ARM/MC/ELF TPsoft is now a proper pseudo inst. | Jason W Kim | 2010-12-08 | 1 | -4/+3 |
| * | Refactor the ARM CMPz* patterns to just use the normal CMP instructions when | Jim Grosbach | 2010-12-07 | 1 | -3/+8 |
| * | Making use of VFP / NEON floating point multiply-accumulate / subtraction is | Evan Cheng | 2010-12-05 | 1 | -1/+16 |
| * | Add support for binary encoding of ARM 'adr' instructions referencing constant | Jim Grosbach | 2010-12-02 | 1 | -19/+5 |
| * | Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR | Jim Grosbach | 2010-12-01 | 1 | -16/+32 |
| * | Elaborate on FIXME. | Jim Grosbach | 2010-12-01 | 1 | -1/+4 |
| * | Add FIXME | Jim Grosbach | 2010-11-30 | 1 | -0/+1 |
| * | Pseudo-ize ARM MOVPCRX | Jim Grosbach | 2010-11-30 | 1 | -8/+6 |
| * | Pseudo-ize BX_CALL and friends. Remove dead instruction format classes. | Jim Grosbach | 2010-11-30 | 1 | -33/+13 |
| * | Rename BX/BRIND/etc patterns to clarify which is actually the BX instruction | Jim Grosbach | 2010-11-30 | 1 | -5/+5 |
| * | Make a few more ARM pseudo instructions actually use the PseudoInst base class. | Jim Grosbach | 2010-11-30 | 1 | -14/+13 |
| * | Predicate encoding should be withing {}s. And general cleanup. | Bill Wendling | 2010-11-30 | 1 | -5/+3 |
| * | Fix the encoding of VLD4-dup alignment. | Bob Wilson | 2010-11-30 | 1 | -0/+9 |
| * | Simplify definitions of the ARM eh.sjlj.*jmp pseudo instructions. | Jim Grosbach | 2010-11-29 | 1 | -9/+6 |
| * | Parameterize ARMPseudoInst size property. | Jim Grosbach | 2010-11-29 | 1 | -23/+17 |
| * | Mark Darwin call instructions as using "r7" to prevent the frame-register | Evan Cheng | 2010-11-29 | 1 | -6/+13 |
| * | Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw | Jim Grosbach | 2010-11-29 | 1 | -4/+0 |
| * | ARM Pseudo-ize tBR_JTr. | Jim Grosbach | 2010-11-29 | 1 | -3/+0 |
| * | The ARM BR_JT* pseudos don't need to use the printer jtblock_operand node to | Jim Grosbach | 2010-11-29 | 1 | -4/+4 |
