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path: root/lib/Target/ARM/ARMInstrNEON.td
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* Somehow we managed to forget to encode the lane index for a large swathe of N...Owen Anderson2011-03-301-20/+20
* Add a ARM-specific SD node for VBSL so that forms with a constant first operandCameron Zwarich2011-03-301-6/+17
* Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually...Owen Anderson2011-03-291-8/+0
* ARM VDUPfd and VDUPfq can just be patterns. The instruction is the sameJim Grosbach2011-03-111-8/+2
* ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32qJim Grosbach2011-03-111-7/+7
* ARM VREV64df and VREV64qf can just be patterns. The instruction is the sameJim Grosbach2011-03-111-2/+2
* * Correct encoding for VSRI.Bill Wendling2011-03-091-25/+63
* Correct the encoding for VRSRA and VSRA instructions.Bill Wendling2011-03-091-13/+14
* * Fix VRSHR and VSHR to have the correct encoding for the immediate.Bill Wendling2011-03-081-33/+65
* Rename the narrow shift right immediate operands to "shr_imm*" operands. AlsoBill Wendling2011-03-071-3/+3
* Narrow right shifts need to encode their immediates differently from a normalBill Wendling2011-03-011-5/+8
* Add patterns to use post-increment addressing for Neon VST1-lane instructions.Bob Wilson2011-02-251-10/+21
* Change VLD3/4 and VST3/4 for quad registers to not update the address register.Bob Wilson2011-02-071-4/+20
* Fix some NEON instruction itineraries.Bob Wilson2011-02-071-12/+16
* Add ARM patterns to match EXTRACT_SUBVECTOR nodes.Bob Wilson2011-01-071-0/+17
* Rearrange some Neon multiclasses. No functional changes.Bob Wilson2010-12-181-74/+76
* Fix result type of Neon floating-point comparisons against zero.Bob Wilson2010-12-181-2/+2
* Add Neon VCVT instructions for f32 <-> f16 conversions.Bob Wilson2010-12-151-0/+19
* Remove the rest of the *_sfp Neon instruction patterns.Bob Wilson2010-12-131-80/+32
* Simplify N2VSPat, removing some unnecessary type arguments.Bob Wilson2010-12-131-13/+12
* Delete a line that I forgot to revert previously.Bob Wilson2010-12-131-1/+0
* Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns.Bob Wilson2010-12-131-21/+13
* Use pseudo instructions for 2-register Neon instructions for scalar FP.Bob Wilson2010-12-131-23/+10
* Remove unused instruction class arguments.Bob Wilson2010-12-131-25/+14
* Add float patterns for Neon vld1-lane/dup and vst1-lane operations.Bob Wilson2010-12-101-0/+17
* Remove unused arguments.Bob Wilson2010-12-101-4/+4
* Making use of VFP / NEON floating point multiply-accumulate / subtraction isEvan Cheng2010-12-051-27/+39
* Fix copy/pasto in vmin.f32 encoding.Jim Grosbach2010-12-021-1/+1
* Use by-name rather than by-order matching for NEON operands.Owen Anderson2010-12-011-318/+318
* Fix the encoding of VLD4-dup alignment.Bob Wilson2010-11-301-37/+28
* Rename VLDnDUP instructions with double-spaced registersBob Wilson2010-11-301-12/+12
* Add support for NEON VLD3-dup instructions.Bob Wilson2010-11-301-1/+53
* Add support for NEON VLD3-dup instructions.Bob Wilson2010-11-291-0/+42
* Add support for NEON VLD2-dup instructions.Bob Wilson2010-11-281-0/+41
* Another minor refactoring for VLD1DUP instructions.Bob Wilson2010-11-281-22/+20
* Refactor. Set alignment bit in VLD1-dup instruction classes.Bob Wilson2010-11-271-25/+17
* Add NEON VLD1-dup instructions (load 1 element to all lanes).Bob Wilson2010-11-271-2/+74
* Use by-name rather than by-order operand matching for some NEON encodings.Owen Anderson2010-11-211-34/+34
* The Vm and Vn register fields must be the same for a register-register vmov.Owen Anderson2010-11-191-2/+6
* Operand namesJim Grosbach2010-11-191-4/+4
* Clarify operand names.Jim Grosbach2010-11-191-3/+3
* Remove trailing whitespace.Jim Grosbach2010-11-181-45/+45
* ARM PseudoInst instructions don't need or use an assembler string. Get rid ofJim Grosbach2010-11-181-2/+2
* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-161-4/+12
* Add support for ARM's specialized vector-compare-against-zero instructions.Owen Anderson2010-11-081-23/+31
* Add codegen and encoding support for the immediate form of vbic.Owen Anderson2010-11-051-4/+41
* Add support for code generation of the one register with immediate form of vorr.Owen Anderson2010-11-031-0/+41
* Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by ele...Owen Anderson2010-11-031-9/+31
* Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson2010-11-031-8/+17
* Break ARM addrmode4 (load/store multiple base address) into its constituentJim Grosbach2010-11-031-4/+6
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