| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remat VLDRD from constpool. Clean up some instruction property specifications. | Evan Cheng | 2009-11-20 | 1 | -3/+4 |
| * | More consistent thumb1 asm printing. | Evan Cheng | 2009-11-19 | 1 | -10/+15 |
| * | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng | 2009-11-06 | 1 | -0/+10 |
| * | The .n suffix must go after the predicate. | Evan Cheng | 2009-11-04 | 1 | -1/+1 |
| * | Use ldr.n to workaround a darwin assembler bug. | Evan Cheng | 2009-11-04 | 1 | -1/+2 |
| * | For Thumb indirect branches, use "mov pc, reg" which does not switch | Bob Wilson | 2009-11-03 | 1 | -1/+1 |
| * | Put BlockAddresses into ARM constant pools. | Bob Wilson | 2009-11-02 | 1 | -1/+0 |
| * | Use cbz and cbnz instructions. | Evan Cheng | 2009-10-31 | 1 | -0/+9 |
| * | Add ARM codegen for indirect branches. | Bob Wilson | 2009-10-30 | 1 | -0/+1 |
| * | Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a | Dan Gohman | 2009-10-29 | 1 | -4/+4 |
| * | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson | 2009-10-28 | 1 | -0/+6 |
| * | Change Thumb1 and Thumb2 instructions to separate opcode from operands with a... | Evan Cheng | 2009-10-27 | 1 | -93/+93 |
| * | Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple, | Evan Cheng | 2009-10-01 | 1 | -5/+6 |
| * | Change ld/st multiples to explicitly model the writeback to base register. Th... | Evan Cheng | 2009-10-01 | 1 | -10/+10 |
| * | Add "isBarrier = 1" to return instructions. | Jim Grosbach | 2009-09-30 | 1 | -2/+2 |
| * | Remove comments which don't add much to .s readibility. | Evan Cheng | 2009-09-09 | 1 | -5/+5 |
| * | Calls clobber FPSCR. | David Goodwin | 2009-09-03 | 1 | -2/+2 |
| * | Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed. | Evan Cheng | 2009-08-31 | 1 | -4/+3 |
| * | Print a nl before pic labels so they start at a new line. This makes assembly... | Evan Cheng | 2009-08-28 | 1 | -1/+1 |
| * | v4, v5 does not support sxtb / sxth. | Evan Cheng | 2009-08-28 | 1 | -3/+9 |
| * | Rename ARM "lane_cst" operands to "nohash_imm" since they are used for | Bob Wilson | 2009-08-21 | 1 | -1/+1 |
| * | Fix an obvious copy-n-paste bug. | Evan Cheng | 2009-08-20 | 1 | -1/+1 |
| * | Update Cortex-A8 instruction itineraries for integer instructions. | David Goodwin | 2009-08-19 | 1 | -72/+72 |
| * | Fix revsh pattern. | Evan Cheng | 2009-08-18 | 1 | -1/+1 |
| * | Also shrink immediate branches; also more assembler workarounds. | Evan Cheng | 2009-08-14 | 1 | -4/+5 |
| * | Shrink ADR and LDR from constantpool late during constantpool island pass. | Evan Cheng | 2009-08-14 | 1 | -4/+5 |
| * | Finalize itineraries for cortex-a8 integer multiply | David Goodwin | 2009-08-13 | 1 | -1/+1 |
| * | Enhance the InstrStage object to enable the specification of an Itinerary wit... | David Goodwin | 2009-08-12 | 1 | -1/+1 |
| * | Shrink Thumb2 movcc instructions. | Evan Cheng | 2009-08-12 | 1 | -2/+9 |
| * | 80 col violation. | Evan Cheng | 2009-08-12 | 1 | -5/+5 |
| * | Shrinkify Thumb2 r = add sp, imm. | Evan Cheng | 2009-08-11 | 1 | -3/+3 |
| * | Shrinkify Thumb2 load / store multiple instructions. | Evan Cheng | 2009-08-11 | 1 | -10/+20 |
| * | Split EVT into MVT and EVT, the former representing _just_ a primitive type, ... | Owen Anderson | 2009-08-11 | 1 | -4/+4 |
| * | Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ... | Owen Anderson | 2009-08-10 | 1 | -4/+4 |
| * | Add support to reduce most of 32-bit Thumb2 arithmetic instructions. | Evan Cheng | 2009-08-10 | 1 | -4/+3 |
| * | Use subclassing to print lane-like immediates (w/o hash) eliminating | Anton Korobeynikov | 2009-08-08 | 1 | -2/+2 |
| * | tADDhirr should target GPR, not tGPR. | Evan Cheng | 2009-08-08 | 1 | -1/+1 |
| * | tBfar is bl, which clobbers LR. | Evan Cheng | 2009-08-07 | 1 | -0/+1 |
| * | It turns out most of the thumb2 instructions are not allowed to touch SP. The... | Evan Cheng | 2009-08-07 | 1 | -7/+23 |
| * | Add parameter to pattern classes to enable an itinerary to be specified for i... | David Goodwin | 2009-08-06 | 1 | -88/+89 |
| * | Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode. | Evan Cheng | 2009-08-04 | 1 | -3/+4 |
| * | Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same | Evan Cheng | 2009-08-01 | 1 | -28/+32 |
| * | Make sure Thumb2 uses the right call instructions. | Evan Cheng | 2009-07-29 | 1 | -7/+53 |
| * | - Fix an obvious copy and paste error. | Evan Cheng | 2009-07-29 | 1 | -1/+1 |
| * | In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is un... | Evan Cheng | 2009-07-28 | 1 | -1/+1 |
| * | Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isT... | David Goodwin | 2009-07-27 | 1 | -17/+17 |
| * | Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ... | Evan Cheng | 2009-07-26 | 1 | -3/+3 |
| * | Since we have moved unified assembly, switch to ADR instruction instead of a ... | Evan Cheng | 2009-07-23 | 1 | -16/+5 |
| * | Use getTargetConstant instead of getConstant since it's meant as an constant ... | Evan Cheng | 2009-07-22 | 1 | -6/+7 |
| * | Don't forget D16 - D31 are clobbered by calls and sjlj eh. | Evan Cheng | 2009-07-22 | 1 | -2/+4 |
