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path: root/lib/Target/ARM/ARMInstrThumb.td
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* Replace the existing ARM disassembler with a new one based on the FixedLenDec...Owen Anderson2011-08-091-11/+17
* Thumb1 BL instructions encoding 22 bits of displacement, not 21.Owen Anderson2011-08-081-1/+4
* Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang...Owen Anderson2011-08-081-4/+12
* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-031-18/+4
* Fix broken encoding of tCBNZ.Owen Anderson2011-08-031-2/+2
* Move imm0_255 to ARMInstrInfo.td with the other immediate predicates.Jim Grosbach2011-08-011-4/+0
* ARM parsing and encoding for SVC instruction.Jim Grosbach2011-07-261-1/+1
* Thumb assembly support for SETEND instruction.Jim Grosbach2011-07-221-14/+4
* Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple...Owen Anderson2011-07-181-10/+15
* Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause ...Owen Anderson2011-07-181-1/+1
* Re-apply r135319 with a fix for the constant island pass.Owen Anderson2011-07-181-41/+20
* Revert r135319 in an attempt to get to unbreak testers.Owen Anderson2011-07-161-20/+41
* Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tB...Owen Anderson2011-07-151-41/+20
* Add OperandTypes for Thumb branch targets.Benjamin Kramer2011-07-141-0/+3
* Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ...Owen Anderson2011-07-131-17/+17
* Range checking for CDP[2] immediates.Jim Grosbach2011-07-131-4/+0
* Fix predicates for Thumb co-processor instructions.Jim Grosbach2011-07-131-94/+0
* Mark tBRIND as predicable.Jim Grosbach2011-07-081-2/+2
* Pseudo-ize tBRIND.Jim Grosbach2011-07-081-12/+6
* Make tBX_RET and tBX_RET_vararg predicable.Jim Grosbach2011-07-081-4/+4
* Pseudo-ize tBX_RET and tBX_RET_vararg.Jim Grosbach2011-07-081-16/+5
* Shuffle productions around a bit.Jim Grosbach2011-07-081-21/+21
* Use tPseudoExpand for tTAILJMPrND and tTAILJMPr.Jim Grosbach2011-07-081-6/+8
* Use tPseudoExpand for tTAILJMPd and tTAILJMPdND.Jim Grosbach2011-07-081-6/+6
* Move Thumb tail call pseudos to Thumb.td file.Jim Grosbach2011-07-081-0/+25
* Use TableGen'erated pseudo lowering for ARM.Jim Grosbach2011-07-081-8/+11
* Pseudo-ize t2MOVCC[ri].Jim Grosbach2011-07-011-26/+1
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-301-38/+4
* Thumb1 register to register MOV instruction is predicable.Jim Grosbach2011-06-301-11/+12
* Pseudo-ize the Thumb tTPsoft instruction.Jim Grosbach2011-06-301-7/+5
* Pseudo-ize the Thumb tPOP_RET instruction.Jim Grosbach2011-06-301-9/+2
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-291-26/+0
* ARM Assembly support for Thumb mov-immediate.Jim Grosbach2011-06-271-4/+5
* Teach dag combine to match halfword byteswap patterns.Evan Cheng2011-06-211-17/+2
* Clean up a few 80 column violations.Jim Grosbach2011-06-131-4/+5
* Fix for setjmp/longjmp exception handling on ARM. setjmp clobbers CPSR.Andrew Trick2011-06-071-1/+1
* Make the branch encoding for tBcc more obvious that it's a 4-byte opcodeEric Christopher2011-05-271-1/+1
* Mark tBX as an indirect branch rather than a return.Cameron Zwarich2011-05-261-8/+8
* Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions.Cameron Zwarich2011-05-251-10/+4
* Move some code to a more logical place.Cameron Zwarich2011-05-251-8/+8
* Change the order of tBX's operands so that the predicate operands come after theCameron Zwarich2011-05-251-1/+1
* Rename tBX_Rm to tBX.Cameron Zwarich2011-05-251-3/+2
* Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to betterCameron Zwarich2011-05-251-2/+2
* Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan.Owen Anderson2011-05-111-4/+8
* Mark ultra-super-registers QQQQ as call-clobbered instead of the D sub-regist...Jakob Stoklund Olesen2011-05-031-8/+2
* Fold ARM coprocessor intrinsics patterns into the instructions defs wheneverBruno Cardoso Lopes2011-05-031-24/+19
* Add a few ARM coprocessor intrinsics. Testcases includedBruno Cardoso Lopes2011-05-031-0/+17
* Let the immediate leaf pattern take transforms and switch the signedEric Christopher2011-04-281-6/+6
* Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) s...Johnny Chen2011-04-221-0/+13
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
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