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path: root/lib/Target/ARM/ARMInstrThumb2.td
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* Shrinkify Thumb2 load / store multiple instructions.Evan Cheng2009-08-111-1/+1
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ...Owen Anderson2009-08-111-4/+4
* Add Thumb2 eh_sjlj_setjmp implementationJim Grosbach2009-08-111-0/+32
* 80 column violation.Evan Cheng2009-08-111-2/+2
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...Owen Anderson2009-08-101-4/+4
* Add support to reduce most of 32-bit Thumb2 arithmetic instructions.Evan Cheng2009-08-101-6/+8
* Use subclassing to print lane-like immediates (w/o hash) eliminatingAnton Korobeynikov2009-08-081-2/+2
* Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.Evan Cheng2009-08-071-3/+3
* It turns out most of the thumb2 instructions are not allowed to touch SP. The...Evan Cheng2009-08-071-2/+36
* Add parameter to pattern classes to enable an itinerary to be specified for i...David Goodwin2009-08-061-118/+118
* Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.Evan Cheng2009-08-041-6/+0
* Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. T...Evan Cheng2009-08-041-2/+9
* Workaround a couple of Darwin assembler bugs.Evan Cheng2009-08-011-5/+22
* Split t2MOVCCs since some assemblers do not recognize mov shifted register al...Evan Cheng2009-08-011-5/+13
* Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the sameEvan Cheng2009-08-011-40/+0
* Thumb2 movcc need .w suffix.Evan Cheng2009-07-311-3/+3
* Darwin assembler now recognizes "orn", so remove workaround.David Goodwin2009-07-301-5/+3
* Darwin assembler now supports "rrx", so remove workaround.David Goodwin2009-07-301-2/+1
* Add missing D* register clobbers for Thumb-2 call.David Goodwin2009-07-301-0/+1
* Make sure Thumb2 uses the right call instructions.Evan Cheng2009-07-291-4/+14
* - Fix an obvious copy and paste error.Evan Cheng2009-07-291-2/+3
* Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte /...Evan Cheng2009-07-291-3/+21
* In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is un...Evan Cheng2009-07-281-4/+3
* Remove support for ORN to workaround <rdar://problem/7096522>.David Goodwin2009-07-281-3/+5
* Add workaround for <rdar://problem/7098328>.David Goodwin2009-07-281-1/+2
* Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.David Goodwin2009-07-281-1/+10
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-15/+0
* ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a...David Goodwin2009-07-271-7/+13
* Thumb-2 does not have RSC.David Goodwin2009-07-271-34/+1
* Add ".w" suffix for wide thumb-2 instructions.David Goodwin2009-07-271-45/+43
* Change Thumb2 jumptable codegen to one that uses two level jumps:Evan Cheng2009-07-251-17/+5
* Uh. It would be useful to actually print the operand.Evan Cheng2009-07-241-1/+1
* Make sure thumb2 jumptable entries are aligned.Evan Cheng2009-07-241-3/+3
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-241-1/+1
* Thumb2 does not allow the use of "pc" register as part of the load / store ad...Evan Cheng2009-07-231-15/+0
* Since we have moved unified assembly, switch to ADR instruction instead of a ...Evan Cheng2009-07-231-12/+3
* Fix frame index elimination to correctly handle thumb-2 addressing modes that...David Goodwin2009-07-231-1/+1
* Use getTargetConstant instead of getConstant since it's meant as an constant ...Evan Cheng2009-07-221-6/+7
* Don't forget D16 - D31 are clobbered by calls and sjlj eh.Evan Cheng2009-07-221-2/+4
* CMP and TST define CPSR, not use it.David Goodwin2009-07-201-1/+1
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng2009-07-111-3/+0
* Add a thumb2 pass to insert IT blocks.Evan Cheng2009-07-101-0/+16
* Fix ldm / stm unified syntax; add t2LDM_RET.Evan Cheng2009-07-091-2/+12
* Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. A...Evan Cheng2009-07-091-2/+3
* Correct comment.Evan Cheng2009-07-091-1/+1
* Use common code for both ARM and Thumb-2 instruction and register info.David Goodwin2009-07-081-2/+2
* Change how so_imm and t2_so_imm are handled. At instruction selection time, t...Evan Cheng2009-07-081-23/+8
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-081-25/+25
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-081-0/+41
* Add Thumb2 movcc instructions.Evan Cheng2009-07-071-1/+18