| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach | 2010-07-16 | 1 | -4/+6 |
| * | Improve 64-subtraction of immediates when parts of the immediate can fit | Jim Grosbach | 2010-07-14 | 1 | -6/+29 |
| * | Add missing address register update to t2LDM_RET instruction. | Bob Wilson | 2010-07-14 | 1 | -1/+1 |
| * | PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas. | Evan Cheng | 2010-06-29 | 1 | -2/+2 |
| * | Always allow Thumb-2 SXTB, SXTH, UXTB, and UXTH. Fixes PR7324. | Eli Friedman | 2010-06-24 | 1 | -11/+9 |
| * | LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want it | Jim Grosbach | 2010-06-21 | 1 | -1/+1 |
| * | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 1 | -0/+1 |
| * | Clean up 80 column violations. No functional change. | Jim Grosbach | 2010-06-02 | 1 | -1/+2 |
| * | Cosmetic cleanup. No functional change. | Jim Grosbach | 2010-05-28 | 1 | -12/+12 |
| * | make sure accesses to set up the jmpbuf don't get moved after it by the sched... | Jim Grosbach | 2010-05-28 | 1 | -2/+3 |
| * | Update the saved stack pointer in the sjlj function context following either | Jim Grosbach | 2010-05-27 | 1 | -5/+3 |
| * | fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence. | Jim Grosbach | 2010-05-26 | 1 | -2/+2 |
| * | Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated. | Bob Wilson | 2010-05-25 | 1 | -6/+6 |
| * | Fix up instruction classes for Thumb2 RSB instructions to be consistent with | Bob Wilson | 2010-05-25 | 1 | -15/+15 |
| * | Allow Thumb2 MVN instructions to set condition codes. The immediate operand | Bob Wilson | 2010-05-24 | 1 | -5/+5 |
| * | Thumb2 RSBS instructions were being printed without the 'S' suffix. | Bob Wilson | 2010-05-24 | 1 | -6/+4 |
| * | t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoi... | Evan Cheng | 2010-05-19 | 1 | -0/+1 |
| * | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng | 2010-05-19 | 1 | -9/+9 |
| * | Mark a few more pattern-less instructions with neverHasSideEffects. This is e... | Evan Cheng | 2010-05-19 | 1 | -0/+4 |
| * | Chris said that the comment char should be escaped. Fix all the occurences of... | Anton Korobeynikov | 2010-05-16 | 1 | -8/+8 |
| * | Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack | Jim Grosbach | 2010-05-05 | 1 | -14/+14 |
| * | Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch by | Jim Grosbach | 2010-05-05 | 1 | -15/+31 |
| * | Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets | Bob Wilson | 2010-04-09 | 1 | -1/+17 |
| * | Remove the writeback flag from ARM's address mode 4. Now that we have separate | Bob Wilson | 2010-03-16 | 1 | -2/+2 |
| * | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson | 2010-03-13 | 1 | -15/+42 |
| * | Set the (Format)F filed of t2Int_MemBarrierV7 & t2Int_SyncBarrierV7 to ThumbFrm, | Johnny Chen | 2010-03-11 | 1 | -2/+2 |
| * | Added Thumb2 LDRD/STRD pre/post variants for disassembly only. | Johnny Chen | 2010-03-11 | 1 | -2/+23 |
| * | Factored out the disassembly printing of CPS option, MSR mask, and Negative Zero | Johnny Chen | 2010-03-10 | 1 | -12/+14 |
| * | MSR (Move to Special Register from ARM core register) requires a mask to specify | Johnny Chen | 2010-03-09 | 1 | -4/+4 |
| * | Fix a crash compiling 254.gap for Thumb2. The Thumb2 add/sub with 12-bit | Bob Wilson | 2010-03-08 | 1 | -3/+3 |
| * | Trivial comment change. | Johnny Chen | 2010-03-05 | 1 | -1/+1 |
| * | Drop the ".w" qualifier for t2UXTB16* instructions as there is no 16-bit version | Johnny Chen | 2010-03-04 | 1 | -1/+27 |
| * | Added 32-bit Thumb instructions for Preload Data (PLD, PLDW) and Preload | Johnny Chen | 2010-03-04 | 1 | -1/+71 |
| * | Added 32-bit Thumb instructions LDRT, LDRBT, LDRHT,,LDRSBT, LDRSHT, STRT, STRBT, | Johnny Chen | 2010-03-03 | 1 | -0/+41 |
| * | Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBG | Johnny Chen | 2010-03-03 | 1 | -0/+28 |
| * | Eliminate unused instruction classes. | Evan Cheng | 2010-03-03 | 1 | -13/+0 |
| * | Added 32-bit Thumb instructions t2DMB variants, t2DSB variants, and t2ISBsy for | Johnny Chen | 2010-03-03 | 1 | -0/+60 |
| * | Added 32-bit Thumb instruction CLREX (Clear-Exclusive) for disassembly only. | Johnny Chen | 2010-03-02 | 1 | -0/+10 |
| * | Removed the extra S from the multiclass def T2I_adde_sube_s_irs as well as from | Johnny Chen | 2010-03-02 | 1 | -14/+14 |
| * | Added 32-bit Thumb instructions: CPS, SDIV, UDIV, SXTB16, SXTAB16, UXTAB16, SEL, | Johnny Chen | 2010-03-02 | 1 | -7/+151 |
| * | AL is an optional mnemonic extension for always, except in IT instructions. | Johnny Chen | 2010-03-02 | 1 | -1/+1 |
| * | The mayHaveSideEffects flag is no longer used. | Dan Gohman | 2010-02-27 | 1 | -2/+2 |
| * | Added the follwoing 32-bit Thumb instructions for disassembly only: | Johnny Chen | 2010-02-26 | 1 | -3/+193 |
| * | Added the following 32-bit Thumb instructions for disassembly only: SMC, RFE, | Johnny Chen | 2010-02-25 | 1 | -0/+59 |
| * | Added the 32-bit Thumb instructions (BXJ) for disassembly only. | Johnny Chen | 2010-02-25 | 1 | -0/+11 |
| * | Added the 32-bit Thumb instructions (MRS and MSR) for disassembly only. | Johnny Chen | 2010-02-25 | 1 | -0/+50 |
| * | 80 column cleanup | Jim Grosbach | 2010-02-16 | 1 | -13/+15 |
| * | Remove trailing whitespace | Jim Grosbach | 2010-02-16 | 1 | -11/+11 |
| * | Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but | Jim Grosbach | 2010-02-16 | 1 | -19/+25 |
| * | tighten up eh.setjmp sequence a bit. | Jim Grosbach | 2010-02-08 | 1 | -8/+9 |
