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path: root/lib/Target/ARM/ARMInstrVFP.td
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* Add encoding for moving a value between two ARM core registers and a doubleworkBill Wendling2010-10-201-6/+28
* Add encodings for movement between ARM core registers and single-precisionBill Wendling2010-10-201-32/+58
* Reformatting. No functionalogicality changes.Bill Wendling2010-10-151-19/+15
* Add support for vmov.f64/.f32 encoding. There's a bit of a hack going onBill Wendling2010-10-141-11/+35
* Add encoding for 'fmstat'.Bill Wendling2010-10-141-0/+2
* - Add encodings for multiply add/subtract instructions in all their glory.Bill Wendling2010-10-141-58/+110
* Add MC encodings for VCVT* instrunctions.Bill Wendling2010-10-131-78/+157
* Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a testBill Wendling2010-10-131-16/+22
* Add encodings for VCVT instructions.Bill Wendling2010-10-131-6/+27
* Add VCMPZ and VABS.Bill Wendling2010-10-131-28/+55
* Refactor VCMP instructions.Bill Wendling2010-10-131-29/+43
* Add encodings for VNMUL[SD].Bill Wendling2010-10-121-6/+8
* Add encodings for VDIV and VMUL.Bill Wendling2010-10-121-12/+34
* Refactor some of the encoding logic into a base class. This keeps us from havingBill Wendling2010-10-121-40/+31
* Add encoding for VSUB and VCMP.Bill Wendling2010-10-121-20/+70
* Encoding for VADDD. Plus a test for the VFP instructions.Bill Wendling2010-10-121-3/+14
* Encoding for ARM-mode VADD.F32 instruction.Jim Grosbach2010-10-121-3/+14
* Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vld...Evan Cheng2010-10-071-8/+8
* Fix typo.Eric Christopher2010-09-281-1/+1
* VFP/NEON load/store multiple instructions are addrmode4, not 5.Jim Grosbach2010-09-081-8/+8
* Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson2010-08-271-20/+20
* ARM: Mark some disassembler only instructions as not available for matching --Daniel Dunbar2010-08-111-0/+4
* Add support for getting & setting the FPSCR application register on ARM when ...Nate Begeman2010-08-031-18/+14
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-4/+4
* Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ...Evan Cheng2010-05-191-4/+4
* Mark some pattern-less instructions as neverHasSideEffects.Evan Cheng2010-05-131-1/+7
* Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON op...Anton Korobeynikov2010-04-071-6/+6
* FCONST{S,D} behaves the same way as FP unary instructions. This is true for b...Anton Korobeynikov2010-04-071-2/+2
* Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9.Anton Korobeynikov2010-04-071-4/+4
* Make the use of the vmla and vmls VFP instructions controllable via cmd line.Jim Grosbach2010-03-241-4/+4
* Revert the rest of 98679.Bob Wilson2010-03-201-4/+0
* Revert this change, since it was causing ARM performance regressions.Bob Wilson2010-03-191-42/+16
* Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov2010-03-181-16/+42
* Get rid of target-specific nodes for fp16 <-> fp32 conversion.Anton Korobeynikov2010-03-181-4/+8
* Disambiguate the *_UPD and * variants by specifying the writeback flag as 1.Johnny Chen2010-03-161-0/+4
* Remove redundant writeback flag in ARM addressing mode 5.Bob Wilson2010-03-161-4/+4
* Add codegen support for FP16 on ARMAnton Korobeynikov2010-03-141-2/+4
* Attempt to appease the arm-linux buildbot by fixing the JIT encodings for newBob Wilson2010-03-131-8/+8
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-131-12/+40
* fix a bunch of partially ambiguous patterns on ARM. As anChris Lattner2010-03-081-22/+26
* The mayHaveSideEffects flag is no longer used.Dan Gohman2010-02-271-1/+1
* Added VCVT (between floating-point and fixed-point, VFP) for disassembly.Johnny Chen2010-02-111-0/+95
* Added VMRS/VMSR for disassembly only.Johnny Chen2010-02-091-0/+25
* Added vcvtb/vcvtt (between half-precision and single-precision, VFP).Johnny Chen2010-02-091-0/+18
* Add VCVTR (between floating-point and integer, VFP) for disassembly purpose.Johnny Chen2010-02-081-0/+31
* Add VCMP (VFP floating-point compare without 'E' bit set) for disassembly pur...Johnny Chen2010-02-081-0/+16
* Added VMOVRRS/VMOVSRR to ARMInstrVFP.td for disassembly purpose.Johnny Chen2010-02-081-0/+14
* VMOVRRD and VMOVDRR both have Inst{7-6} = 0b00.Johnny Chen2010-02-051-2/+6
* Modified encoding bits specification for VFP instructions. In particular, the DJohnny Chen2010-01-291-72/+73
* Data type suffix must come after predicate.Evan Cheng2009-11-241-2/+2
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