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path: root/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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* Simplify RegScavenger::FindUnusedReg.Jakob Stoklund Olesen2009-08-181-6/+2
* Push LLVMContexts through the IntegerType APIs.Owen Anderson2009-08-131-1/+4
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-2/+2
* Code refactoring. No functionality change.Evan Cheng2009-08-081-22/+9
* It turns out most of the thumb2 instructions are not allowed to touch SP. The...Evan Cheng2009-08-071-4/+16
* Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.Evan Cheng2009-08-041-6/+9
* Thumb2 does not have ib (increment before) and da (decrement after) forms of ...Evan Cheng2009-08-041-4/+10
* Load / store multiple pass fixes for Thumb2. Not enabled yet.Evan Cheng2009-08-041-76/+85
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Edwin Török2009-07-141-3/+3
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng2009-07-111-1/+1
* Remove a bogus assertion.Evan Cheng2009-07-101-2/+0
* Initial support for load / store multiple opt pass Thumb2 support (post-alloc...Evan Cheng2009-07-091-55/+158
* Change how so_imm and t2_so_imm are handled. At instruction selection time, t...Evan Cheng2009-07-081-3/+2
* Implement changes from Chris's feedback.Edwin Török2009-07-081-3/+3
* Start converting to new error handling API.Edwin Török2009-07-081-3/+4
* Enable arm pre-allocation load / store multiple optimization pass.Evan Cheng2009-06-191-16/+36
* Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr.Evan Cheng2009-06-191-15/+20
* - Update register allocation hint after coalescing. This is done by the targe...Evan Cheng2009-06-181-18/+48
* Typo.Evan Cheng2009-06-151-1/+1
* Do not form ldrd / strd if the two dests / srcs are the same. Code clean up.Evan Cheng2009-06-151-59/+73
* Silence a warning.Evan Cheng2009-06-151-1/+1
* Part 1.Evan Cheng2009-06-151-6/+197
* Add a ARM specific pre-allocation pass that re-schedule loads / stores fromEvan Cheng2009-06-131-22/+314
* Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order chan...Evan Cheng2009-06-051-5/+5
* When merging multiple load / store instructions. Use the DebugLoc of the firs...Evan Cheng2009-06-051-11/+16
* Code clean up: return vector by reference rather than by value. No functional...Evan Cheng2009-06-051-21/+21
* Re-apply 72756 with fixes. One of those was introduced by we changed MachineI...Evan Cheng2009-06-041-1/+8
* Temporarily revert 72756 for now.Evan Cheng2009-06-031-7/+0
* Fold preceding / trailing base inc / dec into the single load / store as well.Evan Cheng2009-06-031-2/+9
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-9/+10
* Remove refs to non-DebugLoc versions of BuildMI from ARM.Dale Johannesen2009-02-131-7/+13
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-3/+3
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-3/+3
* rename MachineInstr::setInstrDescriptor -> setDescChris Lattner2008-01-111-1/+1
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-2/+2
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-1/+1
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-1/+1
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewis...Chris Lattner2007-12-301-1/+1
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Avoid referencing deleted instruction.Evan Cheng2007-09-191-5/+26
* It's not necessary to do rounding for alloca operations when the requestedDan Gohman2007-07-181-0/+750
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