aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/ARMRegisterInfo.td
Commit message (Expand)AuthorAgeFilesLines
* When using NEON for single-precision FP, the NEON result must be placed in D0...David Goodwin2009-08-051-0/+8
* In thumb mode, r7 is used as frame register. This fixes pr4681.Evan Cheng2009-08-041-0/+11
* Add VFP3 D registers to the DPR register class.Evan Cheng2009-07-291-1/+3
* Fix a obvious copy-n-paste bug.Evan Cheng2009-07-221-1/+1
* Model fpscr to prevent fcmped / fcmpezs etc from being deleted.Evan Cheng2009-07-201-1/+3
* Fix an obvious copy-and-paste error.Bob Wilson2009-07-141-8/+8
* Revert 75309.Bob Wilson2009-07-141-106/+8
* Add superclasses of ARM Neon quad registers. The Q2PR class contains pairs ofBob Wilson2009-07-101-8/+106
* Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson2009-06-221-9/+118
* For Darwin on ARMv6 and newer, make register r9 available for use as aBob Wilson2009-06-221-10/+9
* Remove UseThumbBacktraces. Just check if subtarget is darwin.Evan Cheng2009-06-181-2/+2
* The attached patches implement most of the ARM AAPCS-VFP hard floatAnton Korobeynikov2009-06-081-0/+15
* Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order chan...Evan Cheng2009-06-051-5/+5
* PR2985 / <rdar://problem/6584986>Jim Grosbach2009-04-071-10/+36
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+1
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-16/+16
* Added ARM::CPSR to represent ARM CPSR status register.Evan Cheng2007-07-051-0/+6
* Specify S registers as D registers' sub-registers.Evan Cheng2007-04-201-2/+2
* Change register allocation order to Dale's suggestion.Evan Cheng2007-03-081-14/+18
* ARM always use register scavenger. No longer reserves R12.Evan Cheng2007-03-071-50/+12
* Make requiresRegisterScavenging determination on a per MachineFunction basis.Evan Cheng2007-02-281-8/+8
* Temporary: make R12 available in ARM mode if RegScavenger is being used.Evan Cheng2007-02-281-12/+53
* Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be liv...Evan Cheng2007-02-271-5/+5
* Comment.Evan Cheng2007-01-291-1/+1
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-1/+2
* Clean up ARM PEI code.Evan Cheng2007-01-201-1/+2
* ARM backend contribution from Apple.Evan Cheng2007-01-191-103/+143
* initial support for frame pointersRafael Espindola2006-10-261-1/+4
* fix the names of the 64bit fp registerRafael Espindola2006-10-021-16/+16
* add floating point registersRafael Espindola2006-09-291-18/+94
* Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner2006-08-171-2/+2
* initial implementation of ARMRegisterInfo::eliminateFrameIndexRafael Espindola2006-06-181-1/+7
* added a skeleton of the ARM backendRafael Espindola2006-05-141-0/+56
generated by cgit v1.1 at 2025-01-29 23:03:11 +0000