| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, | Evan Cheng | 2012-12-20 | 1 | -0/+5 |
| * | Make NaCl naming consistent. The triple OSType is called NaCl and is represented | Eli Bendersky | 2012-12-04 | 1 | -1/+1 |
| * | Sort includes for all of the .h files under the 'lib' tree. These were | Chandler Carruth | 2012-12-04 | 1 | -2/+2 |
| * | Add cortex-a5 subtarget to the supported ARM architectures | Quentin Colombet | 2012-11-29 | 1 | -1/+2 |
| * | Add LLVM support for Swift. | Bob Wilson | 2012-09-29 | 1 | -1/+11 |
| * | This patch introduces A15 as a target in LLVM. | Silviu Baranga | 2012-09-13 | 1 | -1/+3 |
| * | Added MispredictPenalty to SchedMachineModel. | Andrew Trick | 2012-08-08 | 1 | -0/+3 |
| * | whitespace | Andrew Trick | 2012-08-08 | 1 | -1/+1 |
| * | Clean up ARM fused multiply + add/sub support some more: rename some isel | Evan Cheng | 2012-04-11 | 1 | -3/+1 |
| * | Fix a number of problems with ARM fused multiply add/subtract instructions. | Evan Cheng | 2012-04-11 | 1 | -1/+1 |
| * | updated patch for the ARM fused multiply add/sub | Sebastian Pop | 2012-03-05 | 1 | -2/+2 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 1 | -0/+5 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 1 | -5/+0 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 1 | -0/+5 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Add fused multiple+add instructions from VFPv4. | Anton Korobeynikov | 2012-01-22 | 1 | -2/+6 |
| * | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng | 2011-12-20 | 1 | -0/+1 |
| * | Hide cpu name checking in ARMSubtarget. | Evan Cheng | 2011-11-09 | 1 | -0/+1 |
| * | Remove NaClMode | David Meyer | 2011-10-18 | 1 | -3/+0 |
| * | Reenable tail calls for iOS 5.0 and later. | Bob Wilson | 2011-10-07 | 1 | -0/+6 |
| * | Check in a patch that has already been code reviewed by Owen that I'd forgott... | James Molloy | 2011-09-28 | 1 | -0/+6 |
| * | Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certain | Nick Lewycky | 2011-09-05 | 1 | -0/+6 |
| * | Rewrite comment in English. | Evan Cheng | 2011-07-07 | 1 | -1/+1 |
| * | Rename attribute 'thumb' to a more descriptive 'thumb-mode'. | Evan Cheng | 2011-07-07 | 1 | -5/+5 |
| * | Compute feature bits at time of MCSubtargetInfo initialization. | Evan Cheng | 2011-07-07 | 1 | -1/+2 |
| * | Change some ARM subtarget features to be single bit yes/no in order to sink t... | Evan Cheng | 2011-07-07 | 1 | -23/+24 |
| * | Factor ARM triple parsing out of ARMSubtarget. Another step towards making AR... | Evan Cheng | 2011-07-07 | 1 | -11/+7 |
| * | Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. | Evan Cheng | 2011-07-01 | 1 | -1/+1 |
| * | ARMv7M vs. ARMv7E-M support. | Jim Grosbach | 2011-07-01 | 1 | -2/+7 |
| * | Rename TargetSubtarget to TargetSubtargetInfo for consistency. | Evan Cheng | 2011-07-01 | 1 | -3/+3 |
| * | - Added MCSubtargetInfo to capture subtarget features and scheduling | Evan Cheng | 2011-07-01 | 1 | -1/+4 |
| * | Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to | Evan Cheng | 2011-06-30 | 1 | -3/+3 |
| * | Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries)... | Evan Cheng | 2011-06-29 | 1 | -2/+1 |
| * | Revert accidental commit. | Evan Cheng | 2011-05-20 | 1 | -6/+0 |
| * | Revert r131664 and fix it in instcombine instead. rdar://9467055 | Evan Cheng | 2011-05-20 | 1 | -0/+6 |
| * | Remove -use-divmod-libcall. Let targets opt in when they are available. | Evan Cheng | 2011-04-20 | 1 | -0/+2 |
| * | ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows() | Daniel Dunbar | 2011-04-19 | 1 | -1/+1 |
| * | Avoid some 's' 16-bit instruction which partially update CPSR | Bob Wilson | 2011-04-19 | 1 | -0/+6 |
| * | Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier | Evan Cheng | 2011-03-31 | 1 | -0/+5 |
| * | Clean up ARM subtarget code by using Triple ADT. | Evan Cheng | 2011-01-11 | 1 | -3/+6 |
| * | Various bits of framework needed for precise machine-level selection | Andrew Trick | 2010-12-24 | 1 | -0/+2 |
| * | whitespace | Andrew Trick | 2010-12-24 | 1 | -1/+1 |
| * | Making use of VFP / NEON floating point multiply-accumulate / subtraction is | Evan Cheng | 2010-12-05 | 1 | -4/+4 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 | 1 | -0/+5 |
| * | PR8359: The ARM backend may end up allocating registers D16 to D31 when | Bob Wilson | 2010-10-12 | 1 | -0/+5 |
| * | Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do | Rafael Espindola | 2010-10-03 | 1 | -23/+0 |
| * | Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. | Bob Wilson | 2010-09-29 | 1 | -2/+2 |
| * | Add a subtarget hook for reporting the misprediction penalty. Use this to pro... | Owen Anderson | 2010-09-28 | 1 | -0/+2 |
| * | Add a command line option "-arm-strict-align" to disallow unaligned memory | Bob Wilson | 2010-09-28 | 1 | -0/+7 |
| * | Hard to imagine there are still people using inferior compilers. | Daniel Dunbar | 2010-09-27 | 1 | -1/+1 |
