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path: root/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
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* Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling2010-11-161-15/+17
* Break ARM addrmode4 (load/store multiple base address) into its constituentJim Grosbach2010-11-031-7/+2
* PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.Jim Grosbach2010-10-281-9/+12
* Detabify and clean up 80 column violations.Jim Grosbach2010-10-131-2/+2
* Refactor the ARM 'setend' instruction pattern. Use a single instruction patternJim Grosbach2010-10-131-2/+6
* Fix vmov.f64 disassembly on targets where sizeof(long) != 8.Benjamin Kramer2010-09-171-2/+2
* store MC FP immediates as a double instead of as an APFloat, thus avoiding anJim Grosbach2010-09-161-1/+4
* Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to registerJim Grosbach2010-09-151-8/+7
* Reapply r113875 with additional cleanups.Jim Grosbach2010-09-141-35/+5
* Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson2010-08-271-8/+7
* explicitly handle no-op cases for clarity. Fixes clang warning.Jim Grosbach2010-08-171-0/+3
* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-171-6/+20
* Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen2010-08-121-2/+9
* The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .tdJohnny Chen2010-08-121-0/+2
* Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen2010-08-111-3/+0
* Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson2010-08-111-7/+10
* - Add subtarget feature -mattr=+db which determine whether an ARM cpu has theEvan Cheng2010-08-111-1/+1
* Add a separate ARM instruction format for Saturate instructions.Bob Wilson2010-08-111-56/+34
* Add support for disassembling VMVN (immediate) instructions. PR7747.Bob Wilson2010-07-311-0/+4
* Add a check in the ARM disassembler for NEON instructions that wouldBob Wilson2010-07-301-5/+9
* Many Thumb2 instructions can reference the full ARM register set (i.e.,Jim Grosbach2010-07-301-0/+3
* Don't assert on an unrecognized BrMiscFrm instruction.Bob Wilson2010-07-291-1/+0
* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-161-3/+5
* Convert some tab stops into spaces.Duncan Sands2010-07-121-2/+2
* Renumber NEON instruction formats to be consecutive.Bob Wilson2010-06-261-2/+0
* Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm toBob Wilson2010-06-251-6/+6
* Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats.Bob Wilson2010-06-251-16/+3
* Silence compiler warnings.Dan Gohman2010-06-191-3/+3
* Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman2010-06-181-20/+22
* Add instruction encoding for the Neon VMOV immediate instruction. This changesBob Wilson2010-06-111-32/+2
* Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen2010-04-211-2/+37
* Better error handling of invalid IT mask '0000', instead of just asserting.Johnny Chen2010-04-191-1/+1
* According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1Johnny Chen2010-04-191-8/+13
* ARM disassembler did not react to recent changes to the NEON instruction table.Johnny Chen2010-04-191-10/+22
* Cast to (uint64_t) instead of relying on the "ul" suffix.Johnny Chen2010-04-161-1/+1
* Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen2010-04-161-1/+2
* DEBUG() print out "Unknown format" msg.Johnny Chen2010-04-151-1/+3
* Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.Johnny Chen2010-04-151-3/+6
* Fixed another assert exposed by fuzzing. Now, the DisassembleVFPLdStMulFrm()Johnny Chen2010-04-141-0/+6
* For t2BFI disassembly, apply the same error checking as in r101205.Johnny Chen2010-04-141-2/+2
* Fixed another assert exposed by fuzzing. The utility function getRegisterEnum()Johnny Chen2010-04-141-178/+188
* Fixed another assert exposed by fuzzing. Now, when an encoding error occursJohnny Chen2010-04-141-4/+14
* Fixed an assert() exposed by fuzzing. Now, instead of assert when an invalidJohnny Chen2010-04-141-0/+3
* Missed this one line for the previous checkin to fix build warnings.Johnny Chen2010-04-071-1/+0
* Fixed warnings pointed out by clang.Johnny Chen2010-04-071-7/+19
* Fixed 3 warnings pointed out by clang.Johnny Chen2010-04-071-3/+3
* Re-apply 100265 but instead disable building of ARM disassembly for now.Evan Cheng2010-04-051-40/+20
* Reverting 100265 to try to get buildbots green again. Lots of self-hosting bu...Evan Cheng2010-04-051-20/+40
* Get rid of the middleman (ARMAlgorithm), which causes more trouble than theJohnny Chen2010-04-031-40/+20
* Fix comment.Johnny Chen2010-04-031-2/+2