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* Fix the handling of edge cases in ARM shifted operands.Tim Northover2012-09-221-0/+5
* Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover2012-09-061-0/+4
* Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover2012-09-061-8/+38
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-241-1/+1
* Remove unnecessary include of ARMGenInstrInfo.inc.Craig Topper2012-08-171-1/+0
* Switch the fixed-length disassembler to be table-driven.Jim Grosbach2012-08-141-411/+425
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-021-3/+8
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-021-12/+1
* Fix a typo (the the => the)Sylvestre Ledru2012-07-231-1/+1
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-101-4/+4
* Revert r159938 (and r159945) to appease the buildbots.Chad Rosier2012-07-091-4/+4
* Oops - correct broken disassembly for VMOVRichard Barton2012-07-091-1/+1
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-091-4/+4
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-061-2/+2
* ARMDisassembler.cpp: Fix utf8 char in comments.NAKAMURA Takumi2012-05-221-3/+3
* Tweak to the fix in r156212, as with the change in removing the shift theKevin Enderby2012-05-041-1/+1
* Fix a bug in the ARM disassembler for wide branch conditional instructionsKevin Enderby2012-05-041-1/+1
* Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby2012-05-031-4/+34
* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-031-4/+6
* ARM: Tweak tADDrSP definition for consistent operand order.Jim Grosbach2012-04-271-1/+1
* Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton2012-04-271-8/+3
* Refactor Thumb ITState handling in ARM Disassembler to more efficiently use i...Richard Barton2012-04-241-31/+69
* Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga2012-04-181-0/+4
* Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ...Silviu Baranga2012-04-181-0/+30
* Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby2012-04-171-7/+1
* Fix a few more places in the ARM disassembler so that branches getKevin Enderby2012-04-121-4/+29
* Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby2012-04-111-0/+2
* Fix ARM disassembly of VLD instructions with writebacks.  And add test a caseKevin Enderby2012-04-111-0/+12
* ARMDisassembler: drop bogus dependency on ARMCodeGenDylan Noblesmith2012-04-032-3/+2
* Remove unnecessary llvm:: qualificationsCraig Topper2012-03-271-209/+209
* Added soft fail checks for the disassembler when decoding some corner cases o...Silviu Baranga2012-03-221-1/+81
* Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR...Silviu Baranga2012-03-221-3/+31
* Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby2012-03-211-0/+19
* The ARM instructions that have an unpredictable behavior when the pc register...Silviu Baranga2012-03-201-2/+8
* Use uint16_t to store registers and opcode in static tables in the target spe...Craig Topper2012-03-111-6/+6
* Tidy up. Remove dead code that slipped into previous commit.Jim Grosbach2012-03-071-6/+0
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-061-0/+7
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-25/+41
* Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.Kevin Enderby2012-03-061-7/+7
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-051-0/+50
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-6/+89
* Make MemoryObject accessor members const againDerek Schuff2012-02-291-4/+4
* Fix the symbolic operand added for the C disassmbler API for the ARM blKevin Enderby2012-02-271-1/+1
* Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby2012-02-231-33/+35
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Make the EDis tables const.Benjamin Kramer2012-02-111-4/+4
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-1/+1
* Enable streaming of bitcodeDerek Schuff2012-02-061-4/+4
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-1/+1
* ARM NEON VTBL/VTBX assembly parsing and encoding.Jim Grosbach2011-12-151-4/+1
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