aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/InstPrinter
Commit message (Expand)AuthorAgeFilesLines
* Merge with LLVM upstream r155090.Shih-wei Liao2012-04-242-13/+7
|\
| * For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby2012-04-131-2/+2
| * Move getOpcodeName from the various target InstPrinters into the superclass M...Benjamin Kramer2012-04-022-5/+0
| * Remove getInstructionName from MCInstPrinter implementations in favor of usin...Craig Topper2012-04-022-4/+2
| * Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ...Craig Topper2012-04-022-3/+4
* | Merge branch 'upstream' into sliao_dShih-wei Liao2012-03-242-36/+13
|\ \ | |/
| * ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-061-5/+4
| * ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-062-23/+11
| * Tidy up. Kill some dead code.Jim Grosbach2012-03-062-10/+0
* | Merge branch 'upstream' into merge-20120305Stephen Hines2012-03-052-7/+147
|\ \ | |/
| * ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-052-0/+11
| * ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-052-0/+10
| * Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-052-2/+4
| * Change ARMInstPrinter::printPredicateOperand() so it will not abort if itKevin Enderby2012-03-011-1/+4
| * Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-191-1/+0
| * Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
| * Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-2/+2
| * NEON VLD4(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-252-1/+29
| * NEON VLD3(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-242-0/+26
| * NEON VLD4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-242-0/+14
| * NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-232-0/+12
| * ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-222-0/+12
| * ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach2011-12-212-0/+12
| * ARM assembly parsing and encoding support for LDRD(label).Jim Grosbach2011-12-191-0/+11
* | Merge with LLVM upstream r146714 (Dec 16th 2011)Logan Chien2011-12-164-6/+32
|\ \ | |/
| * ARM NEON VST2 assembly parsing and encoding.Jim Grosbach2011-12-142-0/+12
| * LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| * ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach2011-11-302-0/+11
| * ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach2011-11-302-0/+9
| * build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-291-5/+0
| * Simplify some uses of utohexstr.Benjamin Kramer2011-11-071-2/+2
| * build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-031-0/+24
| * Fix the issue that r143552 was trying to address the _right_ way. One-regist...Owen Anderson2011-11-021-2/+6
| * Assembly parsing for 4-register variant of VLD1.Jim Grosbach2011-10-212-0/+12
| * Assembly parsing for 3-register variant of VLD1.Jim Grosbach2011-10-212-0/+11
| * ARM VLD parsing and encoding.Jim Grosbach2011-10-212-0/+10
| * whitespace.Jim Grosbach2011-10-211-1/+1
* | Simplify some uses of utohexstr.Benjamin Kramer2011-11-141-2/+2
* | build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-141-0/+24
* | Fix the issue that r143552 was trying to address the _right_ way. One-regist...Owen Anderson2011-11-141-2/+6
* | Assembly parsing for 4-register variant of VLD1.Jim Grosbach2011-11-142-0/+12
* | Assembly parsing for 3-register variant of VLD1.Jim Grosbach2011-11-142-0/+11
* | ARM VLD parsing and encoding.Jim Grosbach2011-11-142-0/+10
* | whitespace.Jim Grosbach2011-11-141-1/+1
* | Apply changes to migrate to upstream Oct 20th 2011.Logan Chien2011-10-211-8/+8
* | Merge with LLVM upstream 2011/10/20 (r142530)Logan Chien2011-10-203-98/+323
|\ \ | |/
| * ARM VTBL (one register) assembly parsing and encoding.Jim Grosbach2011-10-182-0/+6
| * ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach2011-10-122-0/+6
| * 80 columns.Jim Grosbach2011-10-121-2/+1
| * Tidy up. Formatting.Jim Grosbach2011-10-121-2/+2