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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-181-14/+13
| | | | | Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-10/+11
| | | | Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-1/+2
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-2/+2
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-0/+2
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-2/+8
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-241-7/+27
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* Add a MCTargetStreamer interface.Rafael Espindola2013-10-081-0/+9
| | | | | | | | | | | | | This patch fixes an old FIXME by creating a MCTargetStreamer interface and moving the target specific functions for ARM, Mips and PPC to it. The ARM streamer is still declared in a common place because it is used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are completely hidden in the corresponding Target directories. I will send an email to llvmdev with instructions on how to use this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate compact unwind encoding from CFI directives.Bill Wendling2013-09-091-1/+2
| | | | | | | | | | | | | | | | We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps' or compiled their hand-written `.s' file (with CFI directives), we wouldn't generate the compact unwind encoding. Move the algorithm that generates the compact unwind encoding into the MCAsmBackend. This way we can generate the encoding whether the code is from a `.ll' or `.s' file. <rdar://problem/13623355> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190290 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a basic first step towards symbolization of disassembled instructions. This used to be done using externally provided (C API) callbacks. This patch introduces: - the MCSymbolizer class, that mimics the same functions that were used in the X86 and ARM disassemblers to symbolize immediate operands and to annotate loads based off PC (for things like c string literals). - the MCExternalSymbolizer class, which implements the old C API. - the MCRelocationInfo class, which provides a way for targets to translate relocations (either object::RelocationRef, or disassembler C API VariantKinds) to MCExprs. - the MCObjectSymbolizer class, which does symbolization using what it finds in an object::ObjectFile. This makes simple symbolization (with no fancy relocation stuff) work for all object formats! - x86-64 Mach-O and ELF MCRelocationInfos. - A basic ARM Mach-O MCRelocationInfo, that provides just enough to support the C API VariantKinds. Most of what works in otool (the only user of the old symbolization API that I know of) for x86-64 symbolic disassembly (-tvV) works, namely: - symbol references: call _foo; jmp 15 <_foo+50> - relocations: call _foo-_bar; call _foo-4 - __cf?string: leaq 193(%rip), %rax ## literal pool for "hello" Stub support is the main missing part (because libObject doesn't know, among other things, about mach-o indirect symbols). As for the MCSymbolizer API, instead of relying on the disassemblers to call the tryAdding* methods, maybe this could be done automagically using InstrInfo? For instance, even though PC-relative LEAs are used to get the address of string literals in a typical Mach-O file, a MOV would be used in an ELF file. And right now, the explicit symbolization only recognizes PC-relative LEAs. InstrInfo should have already have most of what is needed to know what to symbolize, so this can definitely be improved. I'd also like to remove object::RelocationRef::getValueString (it seems only used by relocation printing in objdump), as simply printing the created MCExpr is definitely enough (and cleaner than string concats). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182625 91177308-0d34-0410-b5e6-96231b3b80d8
* When creating MCAsmBackend pass the CPU string as well. In X86AsmBackendRoman Divacky2012-09-181-1/+1
| | | | | | | | | | store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164132 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach2012-05-151-0/+2
| | | | | | | | Add the MCRegisterInfo to the factories and constructors. Patch by Tom Stellard <Tom.Stellard@amd.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828 91177308-0d34-0410-b5e6-96231b3b80d8
* If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assumeEvan Cheng2012-04-261-1/+1
| | | | | | | | | | | the feature set of v7a. This comes about if the user specifies something like -arch armv7 -mcpu=cortex-m3. We shouldn't be generating instructions such as uxtab in this case. rdar://11318438 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155601 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the ARM specific parts of the ELF writer to Target/ARM.Rafael Espindola2011-12-221-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147115 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to ↵Evan Cheng2011-07-251-2/+2
| | | | | | createMCAsmBackend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
* ARMMCTargetDesc.h: Fixup to add DataTypes.h, or uint32_t would be unavailable.NAKAMURA Takumi2011-07-231-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135837 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink ARM mc routines into MCTargetDesc.Evan Cheng2011-07-231-1/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135825 91177308-0d34-0410-b5e6-96231b3b80d8
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-0/+3
| | | | | | | registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-0/+7
| | | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink feature IsThumb into MC layer.Evan Cheng2011-07-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134608 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor ARM triple parsing out of ARMSubtarget. Another step towards making ↵Evan Cheng2011-07-071-0/+8
| | | | | | ARM subtarget info available to MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134569 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ARM MC registry routines.Evan Cheng2011-07-061-0/+34
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134547 91177308-0d34-0410-b5e6-96231b3b80d8
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