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path: root/lib/Target/ARM/Thumb1InstrInfo.cpp
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* Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properlyJim Grosbach2010-01-151-2/+6
* Silence a clang warning about the deprecated (but perfectly reasonable inJohn McCall2009-12-161-2/+2
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-19/+0
* Refactor code.Evan Cheng2009-11-081-55/+0
* 80-column cleanup of file header commentsJim Grosbach2009-11-071-1/+1
* t2ldrpci_pic can be used for blockaddress as well.Evan Cheng2009-11-071-3/+14
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-061-1/+45
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-021-1/+2
* Fix a couple more places where we are creating ld / st instructions without m...Evan Cheng2009-11-011-2/+18
* Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate theBob Wilson2009-10-281-0/+1
* Forgot about ARM::tPUSH. It also has a new writeback operand.Evan Cheng2009-10-021-0/+1
* ARM::tPOP and tPOP_RET each has an extra writeback operand now.Evan Cheng2009-10-011-0/+1
* It's ok to spill a tGPR register as long as it's still allocated a low register.Evan Cheng2009-08-131-6/+14
* Shrinkify Thumb2 load / store multiple instructions.Evan Cheng2009-08-111-5/+11
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-021-2/+1
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-12/+0
* More DCE.Evan Cheng2009-07-271-4/+0
* Get rid of more dead code.Evan Cheng2009-07-271-2/+0
* Get rid of some more getOpcode calls.Evan Cheng2009-07-271-3/+0
* Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m...Evan Cheng2009-07-271-2/+0
* Merge isLoadFromStackSlot into one since it behaves the same regardless of su...Evan Cheng2009-07-271-32/+0
* Just use a single isMoveInstr to catch all the cases.Evan Cheng2009-07-271-23/+0
* Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...Evan Cheng2009-07-261-12/+12
* Change Thumb2 jumptable codegen to one that uses two level jumps:Evan Cheng2009-07-251-3/+0
* Remove unused member functions.Eli Friedman2009-07-241-42/+0
* FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi...Evan Cheng2009-07-241-8/+0
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-241-8/+4
* Fix frame index elimination to correctly handle thumb-2 addressing modes that...David Goodwin2009-07-231-0/+6
* Emit cross regclass register moves for thumb2.Anton Korobeynikov2009-07-161-5/+0
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng2009-07-111-15/+21
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-081-0/+1
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-081-0/+55
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...David Goodwin2009-07-021-0/+304