| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | RISC architectures get their memory operand folding for free. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -76/+0 |
| * | Replace copyRegToReg with copyPhysReg for ARM. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -24/+17 |
| * | Thumb1 functions using @llvm.returnaddress were not saving the incoming LR. | Bob Wilson | 2010-06-22 | 1 | -3/+3 |
| * | Next round of tail call changes. Register used in a tail | Dale Johannesen | 2010-06-15 | 1 | -3/+3 |
| * | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng | 2010-05-22 | 1 | -5/+21 |
| * | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 2010-05-06 | 1 | -4/+2 |
| * | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 1 | -8/+10 |
| * | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner | 2010-04-02 | 1 | -4/+4 |
| * | Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegis... | Jeffrey Yasskin | 2010-03-22 | 1 | -0/+2 |
| * | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson | 2010-03-13 | 1 | -2/+0 |
| * | Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properly | Jim Grosbach | 2010-01-15 | 1 | -2/+6 |
| * | Silence a clang warning about the deprecated (but perfectly reasonable in | John McCall | 2009-12-16 | 1 | -2/+2 |
| * | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 2009-12-05 | 1 | -19/+0 |
| * | Refactor code. | Evan Cheng | 2009-11-08 | 1 | -55/+0 |
| * | 80-column cleanup of file header comments | Jim Grosbach | 2009-11-07 | 1 | -1/+1 |
| * | t2ldrpci_pic can be used for blockaddress as well. | Evan Cheng | 2009-11-07 | 1 | -3/+14 |
| * | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng | 2009-11-06 | 1 | -1/+45 |
| * | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov | 2009-11-02 | 1 | -1/+2 |
| * | Fix a couple more places where we are creating ld / st instructions without m... | Evan Cheng | 2009-11-01 | 1 | -2/+18 |
| * | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson | 2009-10-28 | 1 | -0/+1 |
| * | Forgot about ARM::tPUSH. It also has a new writeback operand. | Evan Cheng | 2009-10-02 | 1 | -0/+1 |
| * | ARM::tPOP and tPOP_RET each has an extra writeback operand now. | Evan Cheng | 2009-10-01 | 1 | -0/+1 |
| * | It's ok to spill a tGPR register as long as it's still allocated a low register. | Evan Cheng | 2009-08-13 | 1 | -6/+14 |
| * | Shrinkify Thumb2 load / store multiple instructions. | Evan Cheng | 2009-08-11 | 1 | -5/+11 |
| * | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner | 2009-08-02 | 1 | -2/+1 |
| * | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng | 2009-07-28 | 1 | -12/+0 |
| * | More DCE. | Evan Cheng | 2009-07-27 | 1 | -4/+0 |
| * | Get rid of more dead code. | Evan Cheng | 2009-07-27 | 1 | -2/+0 |
| * | Get rid of some more getOpcode calls. | Evan Cheng | 2009-07-27 | 1 | -3/+0 |
| * | Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m... | Evan Cheng | 2009-07-27 | 1 | -2/+0 |
| * | Merge isLoadFromStackSlot into one since it behaves the same regardless of su... | Evan Cheng | 2009-07-27 | 1 | -32/+0 |
| * | Just use a single isMoveInstr to catch all the cases. | Evan Cheng | 2009-07-27 | 1 | -23/+0 |
| * | Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ... | Evan Cheng | 2009-07-26 | 1 | -12/+12 |
| * | Change Thumb2 jumptable codegen to one that uses two level jumps: | Evan Cheng | 2009-07-25 | 1 | -3/+0 |
| * | Remove unused member functions. | Eli Friedman | 2009-07-24 | 1 | -42/+0 |
| * | FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi... | Evan Cheng | 2009-07-24 | 1 | -8/+0 |
| * | Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio... | David Goodwin | 2009-07-24 | 1 | -8/+4 |
| * | Fix frame index elimination to correctly handle thumb-2 addressing modes that... | David Goodwin | 2009-07-23 | 1 | -0/+6 |
| * | Emit cross regclass register moves for thumb2. | Anton Korobeynikov | 2009-07-16 | 1 | -5/+0 |
| * | Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies... | Evan Cheng | 2009-07-11 | 1 | -15/+21 |
| * | Generalize opcode selection in ARMBaseRegisterInfo. | David Goodwin | 2009-07-08 | 1 | -0/+1 |
| * | Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh... | David Goodwin | 2009-07-08 | 1 | -0/+55 |
| * | Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins... | David Goodwin | 2009-07-02 | 1 | -0/+304 |
