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path: root/lib/Target/ARM/Thumb1RegisterInfo.cpp
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* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-4/+3
* Fix a regression from r138445. If we're loading from the frame/base pointerChad Rosier2011-10-101-0/+1
* Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach2011-08-241-14/+6
* 80 columns.Jim Grosbach2011-08-171-1/+2
* Tidy up.Jim Grosbach2011-08-171-2/+1
* Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands2011-08-121-2/+2
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A...Evan Cheng2011-07-201-1/+1
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-301-3/+3
* Thumb1 register to register MOV instruction is predicable.Jim Grosbach2011-06-301-11/+11
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-291-5/+3
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-8/+8
* Use TRI::has{Sub,Super}ClassEq() where possible.Jakob Stoklund Olesen2011-06-021-1/+1
* Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on regist...Jakob Stoklund Olesen2011-04-261-0/+8
* Trim a few unneeded includes.Jim Grosbach2011-04-181-2/+0
* Provide a legal pointer register class when targeting thumb1.Jakob Stoklund Olesen2011-03-311-0/+5
* In Thumb1 mode the constant might be materialized via the load from constpool...Anton Korobeynikov2011-03-051-3/+3
* Implement frame unwinding information emission for Thumb1. Not finished yet b...Anton Korobeynikov2011-03-051-25/+35
* Preliminary support for ARM frame save directives emission via MI flags.Anton Korobeynikov2011-03-051-13/+13
* When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctlyJim Grosbach2011-01-131-4/+7
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-4/+4
* If we're not using reg+reg offset we're using reg+imm, set the opcodeEric Christopher2010-12-211-2/+2
* Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRiBill Wendling2010-12-161-0/+2
* Thumb1 had two patterns for the same load-from-constant-pool instruction.Jim Grosbach2010-12-151-1/+1
* If we're changing the frame register to a physical register other than SP, weBill Wendling2010-12-151-27/+37
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-7/+4
* Avoid release build warnings.Benjamin Kramer2010-11-191-2/+2
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-15/+5
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou...Anton Korobeynikov2010-11-151-203/+0
* Revert r114340 (improvements in Darwin function prologue/epilogue), as it brokeJim Grosbach2010-11-021-11/+27
* Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do anyJim Grosbach2010-10-191-8/+7
* Simplify ARM callee-saved register handling by removing the distinctionJim Grosbach2010-09-201-27/+11
* Re-apply r112883:Jim Grosbach2010-09-031-3/+13
* Revert "For ARM stack frames that utilize variable sized objects and have eit...Daniel Dunbar2010-09-031-13/+3
* For ARM stack frames that utilize variable sized objects and have eitherJim Grosbach2010-09-021-3/+13
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-13/+4
* Add Thumb1 support for virtual frame indices.Jim Grosbach2010-08-191-112/+137
* Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function...Evan Cheng2010-08-101-6/+5
* Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FPDaniel Dunbar2010-08-101-5/+6
* Fix ARM hasFP() semantics. It should return true whenever FP register isEvan Cheng2010-08-101-6/+5
* Constify some arguments.Eric Christopher2010-07-201-1/+1
* Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.Rafael Espindola2010-07-111-15/+0
* skip dbg_value instructionsJim Grosbach2010-06-291-0/+2
* rdar://7937137 - dbg values not being handled in thumb1 version ofJim Grosbach2010-05-041-0/+7
* ReuseFrameIndexVals is used in multiple files, so it can't be static.Dan Gohman2010-04-151-1/+4
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-1/+1
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-3/+2
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-131-3/+2
* comment why we use custom epilogue for t1 functions using vaargs.Jim Grosbach2010-03-101-0/+5
* Clear up the last (famous last words) frame index value reuse issues for Thumb1.Jim Grosbach2010-03-101-1/+1