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lib
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Target
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ARM
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Thumb1RegisterInfo.cpp
Commit message (
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Author
Age
Files
Lines
*
Simplify ARM callee-saved register handling by removing the distinction
Jim Grosbach
2010-09-20
1
-27
/
+11
*
Re-apply r112883:
Jim Grosbach
2010-09-03
1
-3
/
+13
*
Revert "For ARM stack frames that utilize variable sized objects and have eit...
Daniel Dunbar
2010-09-03
1
-13
/
+3
*
For ARM stack frames that utilize variable sized objects and have either
Jim Grosbach
2010-09-02
1
-3
/
+13
*
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
Jim Grosbach
2010-08-26
1
-13
/
+4
*
Add Thumb1 support for virtual frame indices.
Jim Grosbach
2010-08-19
1
-112
/
+137
*
Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function...
Evan Cheng
2010-08-10
1
-6
/
+5
*
Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP
Daniel Dunbar
2010-08-10
1
-5
/
+6
*
Fix ARM hasFP() semantics. It should return true whenever FP register is
Evan Cheng
2010-08-10
1
-6
/
+5
*
Constify some arguments.
Eric Christopher
2010-07-20
1
-1
/
+1
*
Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.
Rafael Espindola
2010-07-11
1
-15
/
+0
*
skip dbg_value instructions
Jim Grosbach
2010-06-29
1
-0
/
+2
*
rdar://7937137 - dbg values not being handled in thumb1 version of
Jim Grosbach
2010-05-04
1
-0
/
+7
*
ReuseFrameIndexVals is used in multiple files, so it can't be static.
Dan Gohman
2010-04-15
1
-1
/
+4
*
Add const qualifiers to CodeGen's use of LLVM IR constructs.
Dan Gohman
2010-04-15
1
-1
/
+1
*
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
Chris Lattner
2010-04-02
1
-3
/
+2
*
Change ARM ld/st multiple instructions to have variant instructions for
Bob Wilson
2010-03-13
1
-3
/
+2
*
comment why we use custom epilogue for t1 functions using vaargs.
Jim Grosbach
2010-03-10
1
-0
/
+5
*
Clear up the last (famous last words) frame index value reuse issues for Thumb1.
Jim Grosbach
2010-03-10
1
-1
/
+1
*
Change the Value argument to eliminateFrameIndex to a type-tagged value. This
Jim Grosbach
2010-03-09
1
-2
/
+3
*
scavenged frame index value re-use gets confused when more than one base
Jim Grosbach
2010-03-09
1
-0
/
+7
*
Thumb1 epilogue code generation needs to take into account that callee-saved
Jim Grosbach
2010-03-06
1
-4
/
+18
*
handle very large call frames when require SPAdj != 0 for Thumb1
Jim Grosbach
2010-02-24
1
-3
/
+3
*
Remove predicates when changing an add into an unpredicable mov.
Jakob Stoklund Olesen
2010-01-19
1
-2
/
+6
*
improve portability to avoid conflicting with std::next in c++'0x.
Chris Lattner
2009-12-03
1
-1
/
+1
*
Use Unified Assembly Syntax for the ARM backend.
Jim Grosbach
2009-11-09
1
-1
/
+1
*
80-column cleanup of file header comments
Jim Grosbach
2009-11-07
1
-2
/
+3
*
Cleanup now that frame index scavenging via post-pass is working for ARM and ...
Jim Grosbach
2009-10-28
1
-12
/
+0
*
Trim more includes.
Evan Cheng
2009-10-22
1
-1
/
+0
*
Missing piece of the ARM frame index post-scavenging conditionalization
Jim Grosbach
2009-10-21
1
-0
/
+12
*
Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*
Jim Grosbach
2009-10-20
1
-12
/
+0
*
Enable allocation of R3 in Thumb1
Jim Grosbach
2009-10-19
1
-1
/
+0
*
Adjust the scavenge register spilling to allow the target to choose an
Jim Grosbach
2009-10-19
1
-15
/
+32
*
Cleanup up unused R3LiveIn tracking.
Jim Grosbach
2009-10-08
1
-9
/
+0
*
Re-enable register scavenging in Thumb1 by default.
Jim Grosbach
2009-10-08
1
-64
/
+9
*
reverting thumb1 scavenging default due to test failure while I figure out wh...
Jim Grosbach
2009-10-07
1
-8
/
+64
*
Enable thumb1 register scavenging by default.
Jim Grosbach
2009-10-07
1
-64
/
+8
*
Add register-reuse to frame-index register scavenging. When a target uses
Jim Grosbach
2009-10-07
1
-13
/
+19
*
In Thumb1, the register scavenger is not always able to use an emergency
Jim Grosbach
2009-10-05
1
-0
/
+25
*
ARM::tPOP and tPOP_RET each has an extra writeback operand now.
Evan Cheng
2009-10-01
1
-0
/
+1
*
Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
Jim Grosbach
2009-09-24
1
-53
/
+83
*
Remove some unused variables and methods warned about by
Duncan Sands
2009-09-06
1
-2
/
+1
*
Push LLVMContexts through the IntegerType APIs.
Owen Anderson
2009-08-13
1
-1
/
+2
*
Shrinkify Thumb2 load / store multiple instructions.
Evan Cheng
2009-08-11
1
-1
/
+1
*
Whitespace cleanup. Remove trailing whitespace.
Jim Grosbach
2009-08-11
1
-1
/
+1
*
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...
Owen Anderson
2009-08-10
1
-1
/
+1
*
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
Evan Cheng
2009-07-28
1
-0
/
+5
*
- More refactoring. This gets rid of all of the getOpcode calls.
Evan Cheng
2009-07-28
1
-2
/
+2
*
Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...
Evan Cheng
2009-07-26
1
-8
/
+8
*
Refactor. Get rid of a few more getOpcode() calls.
Evan Cheng
2009-07-26
1
-0
/
+1
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