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* Bug 13662: Enable GPRPair for all i64 operands of inline asm on ARMWeiming Zhao2013-06-282-12/+45
* ARM: ensure fixed-point conversions have sane typesTim Northover2013-06-281-5/+36
* ARM: Fix pseudo-instructions for SRS (Store Return State).Tilmann Scheller2013-06-281-4/+4
* Add a Subtarget feature 'v8fp' to the ARM backend.Joey Gouly2013-06-275-5/+24
* Clarify and doxygen-ify commentsStephen Lin2013-06-262-16/+20
* ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is n...Stephen Lin2013-06-263-4/+23
* Minor formatting fix to ARMBaseRegisterInfo::getCalleeSavedRegsStephen Lin2013-06-261-7/+5
* Add a subtarget feature 'v8' to the ARM backend.Joey Gouly2013-06-268-4/+25
* ARM: fix more cases where predication may or may not be allowedTim Northover2013-06-264-36/+35
* ARM: allow predicated barriers in Thumb modeTim Northover2013-06-262-18/+16
* Remove the 'generic' CPU from the ARM eabi attributes printer.Joey Gouly2013-06-261-9/+2
* ARM: operands should be explicit when disassembledAmaury de la Vieuville2013-06-261-8/+3
* ARM: check predicate bits for thumb instructionsAmaury de la Vieuville2013-06-241-13/+17
* ARM: rGPR is meant to be unpredictable, not undefinedAmaury de la Vieuville2013-06-241-2/+5
* ARM: fix thumb1 nop decodingAmaury de la Vieuville2013-06-241-9/+0
* ARM: fix IT decodingAmaury de la Vieuville2013-06-241-4/+2
* ARM: enable decoding of pc-relative PLD/PLIAmaury de la Vieuville2013-06-242-46/+148
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-222-2/+2
* DebugInfo: Don't lose unreferenced non-trivial by-value parametersDavid Blaikie2013-06-211-2/+0
* ARM: Remove a (false) dependency on the memoryoperand's value as we do not useQuentin Colombet2013-06-201-1/+2
* This reverts r155000.Joey Gouly2013-06-201-6/+1
* DebugInfo: PR14763/r183329 correct the location of indirect parametersDavid Blaikie2013-06-192-4/+6
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-192-19/+34
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-1/+1
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-1/+1
* ARM: Add optional datatype suffix to NEON mvn asm syntax.Jim Grosbach2013-06-181-1/+6
* [ARMTargetLowering] ARMISD::{SUB,ADD}{C,E} second result is a boolean implyin...Michael Gottesman2013-06-181-1/+11
* Converted an overly aggressive assert to a conditional check in AddCombineTo6...Michael Gottesman2013-06-181-2/+5
* Change the arm assembler to support this from the v7c spec:Kevin Enderby2013-06-181-1/+11
* Reduce indentation.David Blaikie2013-06-181-53/+55
* ARM: fix literal load with positive offset encodingAmaury de la Vieuville2013-06-183-5/+7
* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-183-40/+61
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-183-29/+238
* ARM: thumb stores cannot use PC as dest registerAmaury de la Vieuville2013-06-181-0/+37
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-183-38/+38
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-164-60/+1
* Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2013-06-161-6/+1
* Update machine models. Specify buffer sizes for OOO processors.Andrew Trick2013-06-152-3/+3
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-152-6/+2
* ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville2013-06-141-1/+1
* Enable FastISel on ARM for Linux and NaCl, not MCJITJF Bastien2013-06-141-3/+18
* ARM: fix B decodingAmaury de la Vieuville2013-06-131-1/+1
* ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville2013-06-131-1/+3
* ARM FastISel fix sext/zext foldJF Bastien2013-06-111-19/+36
* Rework r183728, suppress assert(0) for now. Its behavior depends on assertion...NAKAMURA Takumi2013-06-111-1/+4
* It adds support for negative zero offsets for loads and stores.Mihai Popa2013-06-111-1/+1
* This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ar...Mihai Popa2013-06-112-4/+15
* ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville2013-06-112-68/+76
* ARM: Fix STREX/LDREX reecodingAmaury de la Vieuville2013-06-111-10/+28
* Tweak a couple of tests on win32 hosts with +Asserts.NAKAMURA Takumi2013-06-111-1/+1
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