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* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-051-7/+7
* Appease GCC's -Wparentheses.Matt Beaumont-Gay2012-12-041-2/+2
* ARM custom lower ctpop for vector types. Patch by Pete Couperus.Evan Cheng2012-12-041-0/+117
* Make NaCl naming consistent. The triple OSType is called NaCl and is representedEli Bendersky2012-12-041-1/+1
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-046-18/+18
* Remove the old TRI::ResolveRegAllocHint() and getRawAllocationOrder() hooks.Jakob Stoklund Olesen2012-12-042-270/+0
* Implement ARMBaseRegisterInfo::getRegAllocationHints().Jakob Stoklund Olesen2012-12-032-0/+65
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-0334-152/+149
* Codegen failure for vmull with small vectorsSebastian Pop2012-11-301-13/+74
* Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInstKevin Enderby2012-11-291-1/+7
* Add cortex-a5 subtarget to the supported ARM architecturesQuentin Colombet2012-11-292-1/+12
* Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga2012-11-294-12/+102
* ARM: Implement CanLowerReturn so large vectors get expanded into sret.Benjamin Kramer2012-11-282-0/+17
* Remove all references to TargetInstrInfoImpl.Jakob Stoklund Olesen2012-11-282-7/+7
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-9/+7
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-2/+4
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-5/+6
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-4/+10
* Decouple MCInstBuilder from the streamer per Eli's request.Benjamin Kramer2012-11-261-114/+78
* Add MCInstBuilder, a utility class to simplify MCInst creation similar to Mac...Benjamin Kramer2012-11-261-376/+298
* ARM: Share applyFixup between ELF and Darwin.Benjamin Kramer2012-11-241-63/+46
* Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete C...Eli Friedman2012-11-171-0/+1
* Rename methods like PairSRegs() to createSRegpairNode() to meet our codingWeiming Zhao2012-11-171-40/+34
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-166-62/+185
* Make sure FABS on v2f32 and v4f32 is legal on ARM NEONAnton Korobeynikov2012-11-162-7/+9
* Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman2012-11-151-0/+2
* Use empty parens for empty function parameter list instead of '(void)'.Dmitri Gribenko2012-11-153-3/+3
* Revert changing FNEG of v4f32 to Expand. It's legal.Craig Topper2012-11-151-1/+0
* Make FNEG and FABS of v4f32 Expand.Craig Topper2012-11-151-0/+2
* Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.Craig Topper2012-11-151-0/+4
* The code pattern "imm0_255_neg" is used for checking if an immediate value is...Nadav Rotem2012-11-141-6/+7
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-142-1/+19
* misched: Target-independent support for load/store clustering.Andrew Trick2012-11-121-0/+6
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-103-47/+2
* Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.Anton Korobeynikov2012-11-091-0/+3
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-092-10/+5
* Add support for -mstrict-align compiler option for ARM targets.Chad Rosier2012-11-092-5/+10
* Recommit modified r167540.Amara Emerson2012-11-081-4/+19
* Revert r167540 until regression tests are updated.Amara Emerson2012-11-071-21/+4
* Improve ARM build attribute emission for architectures types.Amara Emerson2012-11-071-4/+21
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-071-1/+4
* Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier2012-11-067-28/+23
* Vext Lowering was missing opportunitiesQuentin Colombet2012-11-021-4/+40
* Revert the series of commits starting with r166578 which introduced theChandler Carruth2012-11-011-2/+1
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-301-4/+4
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-304-4/+6
* Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby2012-10-292-11/+23
* Remove TargetELFWriterInfo.Rafael Espindola2012-10-285-149/+0
* [code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet2012-10-271-2/+8
* Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."Jakob Stoklund Olesen2012-10-262-66/+17
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