| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it | Duncan Sands | 2010-05-11 | 1 | -1/+1 |
| * | Implement a bunch more TargetSelectionDAGInfo infrastructure. | Dan Gohman | 2010-05-11 | 6 | -124/+145 |
| * | Remove the TargetLowering::getSubtarget() virtual function, which | Dan Gohman | 2010-05-11 | 1 | -1/+1 |
| * | Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction. | Evan Cheng | 2010-05-11 | 3 | -4/+7 |
| * | Model some vst3 and vst4 with reg_sequence. | Evan Cheng | 2010-05-11 | 2 | -11/+49 |
| * | Model some vld3 instructions with REG_SEQUENCE. | Evan Cheng | 2010-05-10 | 2 | -30/+87 |
| * | Model vld2 / vst2 with reg_sequence. | Evan Cheng | 2010-05-10 | 3 | -18/+95 |
| * | Clean up the conditional for handling of sign_extend_inreg based on | Jim Grosbach | 2010-05-07 | 1 | -2/+5 |
| * | Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack s... | Evan Cheng | 2010-05-07 | 2 | -15/+39 |
| * | Use VSTMD / VLDMD for spills and reloads of Q registers instead of VSTMQ / VL... | Evan Cheng | 2010-05-07 | 1 | -9/+15 |
| * | Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q... | Evan Cheng | 2010-05-07 | 2 | -32/+23 |
| * | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 2010-05-06 | 7 | -18/+17 |
| * | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 6 | -26/+38 |
| * | Add a missing break statement to fix unintentional fall-through | Bob Wilson | 2010-05-06 | 1 | -4/+3 |
| * | Fix unintentional fallthrough. Patch by Edmund Grimley-Evans <Edmund.Grimley-... | Jim Grosbach | 2010-05-06 | 1 | -1/+2 |
| * | Fix "warning: extra ';' inside a struct or union" when building llvm with clang | Shantonu Sen | 2010-05-06 | 1 | -2/+2 |
| * | Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coa... | Evan Cheng | 2010-05-06 | 5 | -23/+146 |
| * | Revert r103157, which broke test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll. | Dan Gohman | 2010-05-06 | 1 | -4/+2 |
| * | Revert r103156 since it was breaking the build bots. | Eric Christopher | 2010-05-06 | 5 | -142/+21 |
| * | Fix an obvious bug in isMoveInstr. It needs to return sub-register indices. | Evan Cheng | 2010-05-06 | 1 | -2/+4 |
| * | Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registe... | Evan Cheng | 2010-05-06 | 5 | -21/+142 |
| * | Cosmetic changes. | Evan Cheng | 2010-05-06 | 1 | -7/+7 |
| * | storeRegToStackSlot has forgotten about QPR_8 register class. | Evan Cheng | 2010-05-06 | 1 | -1/+2 |
| * | Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack | Jim Grosbach | 2010-05-05 | 6 | -24/+38 |
| * | Do not pre-allocate references of D registers pairs if they are extracted fro... | Evan Cheng | 2010-05-05 | 1 | -8/+28 |
| * | Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch by | Jim Grosbach | 2010-05-05 | 6 | -20/+49 |
| * | Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE. | Evan Cheng | 2010-05-05 | 3 | -4/+38 |
| * | With -neon-reg-sequence, models forming a Q register from a pair of consecuti... | Evan Cheng | 2010-05-04 | 1 | -2/+11 |
| * | Do not pre-allocate for registers which form a REG_SEQUENCE. | Evan Cheng | 2010-05-04 | 1 | -0/+28 |
| * | rdar://7937137 - dbg values not being handled in thumb1 version of | Jim Grosbach | 2010-05-04 | 1 | -0/+7 |
| * | Get rid of the EdgeMapping map. Instead, just check for BasicBlock | Dan Gohman | 2010-05-01 | 2 | -9/+5 |
| * | Frame index can be negative. | Evan Cheng | 2010-04-29 | 2 | -2/+2 |
| * | Add sizes non-floating point versions for the eh sjlj intrinsic expansions. | Jim Grosbach | 2010-04-28 | 1 | -1/+2 |
| * | Handle register-to-register copies within the tGPR class. | Bob Wilson | 2010-04-26 | 1 | -12/+16 |
| * | Handle target-specific form of DBG_VALUE in AsmPrinter. | Dale Johannesen | 2010-04-26 | 1 | -0/+19 |
| * | Add ARM specific emitFrameIndexDebugValue. | Evan Cheng | 2010-04-26 | 3 | -0/+23 |
| * | Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield | Jim Grosbach | 2010-04-22 | 1 | -6/+40 |
| * | Modified some assert() msg strings; no other functionality change. | Johnny Chen | 2010-04-21 | 1 | -14/+14 |
| * | Implement -disable-non-leaf-fp-elim which disable frame pointer elimination | Evan Cheng | 2010-04-21 | 1 | -2/+2 |
| * | Thumb instructions which have reglist operands at the end and predicate operands | Johnny Chen | 2010-04-21 | 3 | -14/+68 |
| * | Better error-handling of getBitFieldInvMask() where msb < lsb (encoding error), | Johnny Chen | 2010-04-20 | 1 | -6/+14 |
| * | For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='11... | Johnny Chen | 2010-04-20 | 1 | -5/+5 |
| * | Better error-handling for DisassembleThumb2DPModImm() with 2-reg operands where | Johnny Chen | 2010-04-20 | 1 | -1/+4 |
| * | More IT instruction error-handling improvements from fuzzing. | Johnny Chen | 2010-04-20 | 1 | -3/+17 |
| * | Better error handling of invalid IT mask '0000', instead of just asserting. | Johnny Chen | 2010-04-19 | 3 | -5/+11 |
| * | According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1 | Johnny Chen | 2010-04-19 | 1 | -8/+13 |
| * | Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operand | Johnny Chen | 2010-04-19 | 1 | -3/+6 |
| * | ARM disassembler did not react to recent changes to the NEON instruction table. | Johnny Chen | 2010-04-19 | 1 | -10/+22 |
| * | Make processor FUs unique for given itinerary. This extends the limit of 32 | Anton Korobeynikov | 2010-04-18 | 4 | -838/+846 |
| * | Fix -Wcast-qual warnings. | Dan Gohman | 2010-04-17 | 1 | -4/+5 |
