| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Use uint16_t to store instruction implicit uses and defs. Reduces static data. | Craig Topper | 2012-03-08 | 1 | -1/+1 |
| * | ARM don't use MCRelaxAll, as it's not safe on ARM. | Jim Grosbach | 2012-03-08 | 1 | -2/+2 |
| * | [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point | Chad Rosier | 2012-03-07 | 1 | -4/+2 |
| * | ARM pre-v6 assembly parsing for umull/smull. | Jim Grosbach | 2012-03-07 | 1 | -0/+10 |
| * | ARM pre-v6 alias for 'nop' to 'mov r0, r0' | Jim Grosbach | 2012-03-07 | 1 | -0/+4 |
| * | Tidy up. Remove dead code that slipped into previous commit. | Jim Grosbach | 2012-03-07 | 1 | -6/+0 |
| * | ARM more NEON VLD/VST composite physical register refactoring. | Jim Grosbach | 2012-03-06 | 5 | -39/+58 |
| * | ARM refactor more NEON VLD/VST instructions to use composite physregs | Jim Grosbach | 2012-03-06 | 8 | -168/+117 |
| * | Tidy up. Kill some dead code. | Jim Grosbach | 2012-03-06 | 2 | -10/+0 |
| * | Allow the same types in DPair as in QPR. | Jakob Stoklund Olesen | 2012-03-06 | 1 | -1/+2 |
| * | Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction. | Kevin Enderby | 2012-03-06 | 1 | -7/+7 |
| * | Add <imp-def> operands when reloading into physregs. | Jakob Stoklund Olesen | 2012-03-06 | 1 | -0/+4 |
| * | Split fpscr into two registers: FPSCR and FPSCR_NZCV. | Lang Hames | 2012-03-06 | 4 | -11/+17 |
| * | ARM vpush/vpop assembler mnemonics accept an optional size suffix. | Jim Grosbach | 2012-03-05 | 1 | -0/+8 |
| * | ARM Refactor VLD/VST spaced pair instructions. | Jim Grosbach | 2012-03-05 | 5 | -26/+91 |
| * | ARM Remove a bit of dead code. | Jim Grosbach | 2012-03-05 | 2 | -14/+0 |
| * | ARM refactor away a bunch of VLD/VST pseudo instructions. | Jim Grosbach | 2012-03-05 | 11 | -246/+239 |
| * | Make MCRegisterInfo available to the the MCInstPrinter. | Jim Grosbach | 2012-03-05 | 3 | -3/+6 |
| * | updated patch for the ARM fused multiply add/sub | Sebastian Pop | 2012-03-05 | 7 | -39/+41 |
| * | Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati... | Craig Topper | 2012-03-05 | 1 | -2/+2 |
| * | Use <def,undef> operands when spilling NEON bundles. | Jakob Stoklund Olesen | 2012-03-04 | 1 | -14/+12 |
| * | Use uint16_t instead of unsigned to store registers in reg classes. Reduces s... | Craig Topper | 2012-03-04 | 2 | -14/+14 |
| * | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper | 2012-03-04 | 5 | -10/+10 |
| * | Neuter the optimization I implemented with r107852 and r108258 which turn some | Evan Cheng | 2012-03-01 | 1 | -8/+12 |
| * | Handle regmasks in Thumb1RegisterInfo::saveScavengerRegister(). | Jakob Stoklund Olesen | 2012-03-01 | 1 | -0/+5 |
| * | ARM use the right opcode for FP<->Integer move in fast-isel. | Jim Grosbach | 2012-03-01 | 1 | -2/+2 |
| * | Change ARMInstPrinter::printPredicateOperand() so it will not abort if it | Kevin Enderby | 2012-03-01 | 1 | -1/+4 |
| * | Make MemoryObject accessor members const again | Derek Schuff | 2012-02-29 | 1 | -4/+4 |
| * | ARM implement TargetInstrInfo::getNoopForMachoTarget() | Jim Grosbach | 2012-02-28 | 8 | -1/+51 |
| * | ARM vbit/vbif/vbsl assembly optional size suffix. | Jim Grosbach | 2012-02-28 | 1 | -0/+14 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 8 | -9/+135 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 8 | -135/+9 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 8 | -9/+135 |
| * | Enable ARM base pointer when calling functions with large arguments. | Jakob Stoklund Olesen | 2012-02-28 | 3 | -5/+44 |
| * | ARM BL/BLX instruction fixups should use relocations. | Jim Grosbach | 2012-02-27 | 7 | -13/+46 |
| * | Fix the symbolic operand added for the C disassmbler API for the ARM bl | Kevin Enderby | 2012-02-27 | 1 | -1/+1 |
| * | Remove unused cl::opt, make another opt static. | Benjamin Kramer | 2012-02-24 | 1 | -1/+1 |
| * | Thumb2 asm aliases for wide bitwise w/ immediate instructions. | Jim Grosbach | 2012-02-24 | 1 | -0/+9 |
| * | comment fix | Jia Liu | 2012-02-24 | 1 | -1/+1 |
| * | Switch ARM target to register masks. | Jakob Stoklund Olesen | 2012-02-24 | 5 | -35/+25 |
| * | Make sure the regs are low regs for tMUL size reduction. | Jim Grosbach | 2012-02-24 | 1 | -1/+6 |
| * | Thumb2 size reduction fix for tied operands of tMUL. | Jim Grosbach | 2012-02-24 | 1 | -1/+13 |
| * | When emitting a cmp with 0 for a lowered select, mask out the high | Dan Gohman | 2012-02-24 | 1 | -0/+5 |
| * | Updated the llvm-mc disassembler C API to support for the X86 target. | Kevin Enderby | 2012-02-23 | 1 | -33/+35 |
| * | Remove unused variable. | Duncan Sands | 2012-02-23 | 1 | -1/+0 |
| * | Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits | Evan Cheng | 2012-02-23 | 1 | -0/+15 |
| * | Optimize a couple of common patterns involving conditional moves where the false | Evan Cheng | 2012-02-23 | 5 | -8/+312 |
| * | Remove extra semi-colons. | Chad Rosier | 2012-02-22 | 1 | -1/+1 |
| * | Make all pointers to TargetRegisterClass const since they are all pointers to... | Craig Topper | 2012-02-22 | 3 | -16/+16 |
| * | Clarify ARM calling conventions. | Jakob Stoklund Olesen | 2012-02-22 | 1 | -0/+2 |
