aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM
Commit message (Expand)AuthorAgeFilesLines
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-311-23/+23
* ARM: permit upper-case BE/LE on setend instructionTim Northover2013-05-311-1/+1
* ARM: add fstmx and fldmx instructions for assemblyTim Northover2013-05-313-8/+70
* ARM: fix VEXT encoding corner caseTim Northover2013-05-311-5/+6
* Revert r182937 and r182877.Rafael Espindola2013-05-301-17/+3
* Order CALLSEQ_START and CALLSEQ_END nodes.Andrew Trick2013-05-291-2/+3
* Enable FastISel on ARM for Linux and NaClJF Bastien2013-05-291-3/+17
* Tidy some register classes for ARM and ThumbJF Bastien2013-05-292-3/+3
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-255-155/+155
* Follow up of the introduction of MCSymbolizer.Quentin Colombet2013-05-241-4/+5
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-2410-28/+28
* Remove the Copied parameter from MemoryObject::readBytes.Benjamin Kramer2013-05-241-3/+3
* MC: Disassembled CFG reconstruction.Ahmed Bougacha2013-05-241-4/+5
* Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-245-107/+66
* ARM: implement @llvm.readcyclecounter intrinsicTim Northover2013-05-231-1/+43
* ARM: Add Performance Monitor Extensions featureTim Northover2013-05-233-1/+10
* Simplify logic now that r182490 is in place. No functional change intended.Chad Rosier2013-05-221-4/+4
* VSTn instructions have a number of encoding constraints which are not impleme...Mihai Popa2013-05-202-21/+72
* Q registers are encoded in fields of the same length as D registers. As Q reg...Mihai Popa2013-05-201-1/+1
* PR15868 fix.Stepan Dyatkovskiy2013-05-205-11/+69
* Replace some bit operations with simpler ones. No functionality change.Benjamin Kramer2013-05-193-12/+9
* Add LLVMContext argument to getSetCCResultTypeMatt Arsenault2013-05-182-2/+2
* Support unaligned load/store on more ARM targetsJF Bastien2013-05-172-10/+46
* Revert "Support unaligned load/store on more ARM targets"Derek Schuff2013-05-151-17/+4
* Support unaligned load/store on more ARM targetsDerek Schuff2013-05-151-4/+17
* ARM ISel: Don't create illegal types during LowerMULArnold Schwaighofer2013-05-141-25/+32
* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-134-11/+43
* Correctly preserve the input chain for potential tailcall nodes whoseLang Hames2013-05-131-1/+1
* Remove the MachineMove class.Rafael Espindola2013-05-132-1/+3
* Remove unused argument.Rafael Espindola2013-05-101-1/+1
* Implement AsmParser for ARM unwind directives.Logan Chien2013-05-102-27/+284
* For r181148: fixed warning 'enumeral and non-enumeral type in conditional exp...Stepan Dyatkovskiy2013-05-081-1/+1
* ARM AnalyzeBranch should conservatively return true when it sees a predicatedEvan Cheng2013-05-051-3/+9
* For ARM backend, fixed "byval" attribute support.Stepan Dyatkovskiy2013-05-052-33/+104
* Add ArrayRef constructor from None, and do the cleanups that this constructor...Dmitri Gribenko2013-05-051-2/+2
* Revert r181009.Amara Emerson2013-05-032-8/+139
* Add support for reading ARM ELF build attributes.Amara Emerson2013-05-032-139/+8
* Text files should not be marked executable.Rafael Espindola2013-04-301-0/+0
* s tightens up the encoding description for ARM post-indexed ldr instructions....Mihai Popa2013-04-301-0/+1
* Refactoring patch.Stepan Dyatkovskiy2013-04-305-66/+100
* ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet2013-04-264-16/+22
* ARM/NEON: Pattern match vector integer abs to vabs.Benjamin Kramer2013-04-261-0/+23
* ARM cost model: Integer div and rem is lowered to a function callArnold Schwaighofer2013-04-251-0/+68
* Add more tests for r179925 to verify correct handling of signext/zeroext; str...Stephen Lin2013-04-231-3/+6
* Lowercase "is" boolean variable prefix for consistency within function, no fu...Stephen Lin2013-04-231-12/+12
* No really, don't store anything to this since it's unconditionallyEric Christopher2013-04-221-1/+1
* Remove variable store that is never read.Eric Christopher2013-04-221-1/+1
* Fix for 5.5 Parameter Passing --> Stage C:Stepan Dyatkovskiy2013-04-223-2/+8
* Legalize vector truncates by parts rather than just splitting.Jim Grosbach2013-04-211-3/+3
* ARM: Use ldrd/strd to spill 64-bit pairs when available.Tim Northover2013-04-213-37/+106