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* 80 column violationsJim Grosbach2010-01-061-4/+6
* Add Target hook to duplicate machine instructions.Jakob Stoklund Olesen2010-01-062-21/+48
* Addressing mode 6 (load/store) instructions can't encode an immediate offsetJim Grosbach2010-01-061-1/+4
* Undo r92785, it caused test failure.Johnny Chen2010-01-051-3/+3
* Add Rt2 to the asm format string for 32-bit Thumb load/store register dualJohnny Chen2010-01-051-3/+3
* Change SelectCode's argument from SDValue to SDNode *, to make it moreDan Gohman2010-01-052-165/+160
* Add missing include (for inline PATypeHolder::get).Benjamin Kramer2009-12-281-0/+1
* Remove dead variable.Bill Wendling2009-12-281-2/+0
* Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which areBill Wendling2009-12-281-1/+2
* Move kill flags when the same register occurs more than once in a sequence.Jakob Stoklund Olesen2009-12-231-1/+22
* Handle undef operands properly.Jakob Stoklund Olesen2009-12-231-4/+8
* Make insert position available to MergeOpsUpdate.Jakob Stoklund Olesen2009-12-231-24/+25
* Perform kill flag calculations in new method. No functional changes.Jakob Stoklund Olesen2009-12-231-12/+15
* Move repeated code to a new method. No functional change.Jakob Stoklund Olesen2009-12-231-17/+47
* Add a SPR register class to the ARM target.Jakob Stoklund Olesen2009-12-222-1/+14
* Use proper move instructions. Make the verifier happy.Jakob Stoklund Olesen2009-12-221-1/+1
* Add more plumbing. This time in the LowerArguments and "get" functions whichBill Wendling2009-12-221-1/+2
* Delete the instruction just before the function terminates for consistency sake.Evan Cheng2009-12-211-2/+3
* Fix a bunch of little errors that Clang complains about when its being pedanticDouglas Gregor2009-12-191-1/+1
* Fix libstdc++ build on ARM linux and part of PR5770.Rafael Espindola2009-12-181-0/+3
* Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson2009-12-181-2/+2
* Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.Johnny Chen2009-12-161-1/+1
* Silence a clang warning about the deprecated (but perfectly reasonable inJohn McCall2009-12-161-2/+2
* Mark STREX* as earlyclobber for the success result register.Jim Grosbach2009-12-162-2/+2
* Add encoding bits for some Thumb instructions. Plus explicitly set the top twoJohnny Chen2009-12-163-10/+18
* Every anonymous namespace is different. Caught by clang++.John McCall2009-12-161-4/+0
* Change indirect-globals to use a dedicated allocIndirectGV. This lets usJeffrey Yasskin2009-12-151-11/+5
* Added encoding bits for the Thumb ISA. Initial checkin.Johnny Chen2009-12-153-348/+1219
* nand atomic requires opposite operand orderingJim Grosbach2009-12-151-3/+9
* Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguateJohnny Chen2009-12-141-0/+1
* v6 sync insn copy/paste errorJim Grosbach2009-12-141-1/+1
* Add ARMv6 memory and sync barrier instructionsJim Grosbach2009-12-143-14/+45
* Fixed encoding bits typo of ldrexd/strexd.Johnny Chen2009-12-141-2/+2
* Thumb2 atomic operationsJim Grosbach2009-12-141-44/+83
* correct selection requirements for thumb2 vs. arm versions of the barrier int...Jim Grosbach2009-12-142-4/+6
* add Thumb2 atomic and memory barrier instruction definitionsJim Grosbach2009-12-141-0/+60
* whitespaceJim Grosbach2009-12-141-1/+0
* ARM memory barrier instructions are not predicableJim Grosbach2009-12-142-3/+20
* add ldrexd/strexd instructionsJim Grosbach2009-12-141-2/+11
* atomic binary operations up to 32-bits wide.Jim Grosbach2009-12-141-5/+63
* Framework for atomic binary operations. The emitter for the pseudo instructionsJim Grosbach2009-12-123-19/+150
* memory barrier instructions by definition have side effects. This prevents th...Jim Grosbach2009-12-111-1/+1
* Store Register Exclusive should leave the source register Inst{3-0} unspecified.Johnny Chen2009-12-111-1/+1
* Update properties.Jim Grosbach2009-12-111-2/+2
* Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in pr...Jim Grosbach2009-12-115-0/+152
* Add instruction encoding for DMB/DSBJim Grosbach2009-12-101-3/+11
* Add memory barrier intrinsic support for ARM. Moving towards adding the atomi...Jim Grosbach2009-12-103-1/+49
* - Support inline asm 'w' constraint for 128-bit vector types.Evan Cheng2009-12-082-0/+6
* Dynamic stack realignment use of sp register as source/dest registerAnton Korobeynikov2009-12-061-4/+27
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-057-74/+0
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