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* trim #includes.Chris Lattner2010-11-141-5/+1
* rename LowerToMCInst -> LowerARMMachineInstrToMCInst.Chris Lattner2010-11-143-5/+7
* even more simplifications. ARM MCInstLowering is now justChris Lattner2010-11-144-60/+19
* more shrinkificationChris Lattner2010-11-142-10/+1
* more simplifications.Chris Lattner2010-11-142-92/+18
* simplify and tidy upChris Lattner2010-11-143-41/+16
* stub out a powerpc MCInstPrinter implementation.Chris Lattner2010-11-141-1/+1
* Second attempt at providing correct encodings for Thumb2 binary operators.Owen Anderson2010-11-141-51/+105
* Comment out the defms until they're activated.Bill Wendling2010-11-133-3/+7
* Add uses of the *_ldst_multi multiclasses. These aren't used yet.Bill Wendling2010-11-134-0/+48
* Convert the modes to lower case.Bill Wendling2010-11-134-22/+22
* Minor cleanups:Bill Wendling2010-11-132-11/+14
* Add *_ldst_mult multiclasses to the ARM back-end. These will be used in theBill Wendling2010-11-135-0/+229
* MC: Simplify Mach-O and ELF object writer implementations.Daniel Dunbar2010-11-131-8/+7
* Conditional moves are slightly more expensive than moves.Evan Cheng2010-11-136-10/+11
* Add conditional move of large immediate.Evan Cheng2010-11-134-18/+47
* Swap multiclass operand order for consistency with other patterns.Jim Grosbach2010-11-131-3/+3
* Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexedJim Grosbach2010-11-131-18/+12
* More ARM load/store indexed refactoring. Also fix an incorrect IndexModeJim Grosbach2010-11-132-75/+54
* Fix an obvious typo which inverted an immediate.Evan Cheng2010-11-131-1/+1
* Temporarily revert this.Eric Christopher2010-11-121-5/+4
* For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled w...Evan Cheng2010-11-123-15/+11
* Revert r118939 while I work out why it broke some buildbots.Owen Anderson2010-11-121-65/+52
* Attemt to provide correct encodings for Thumb2 binary operators.Owen Anderson2010-11-121-52/+65
* Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o...Evan Cheng2010-11-125-72/+34
* Make this happen for ARM like x86. Don't entirely bail out whenEric Christopher2010-11-121-4/+5
* Add conditional mvn instructions.Evan Cheng2010-11-123-10/+67
* Zap a copy/paste-o bit of dead code.Jim Grosbach2010-11-121-2/+0
* Refactor to parameterize some ARM load/store encoding patterns. PreparatoryJim Grosbach2010-11-122-86/+24
* First stab at providing correct Thumb2 encodings, start with adc.Owen Anderson2010-11-123-19/+122
* Add some missing isel predicates on def : pat patterns to avoid generating VF...Evan Cheng2010-11-123-64/+54
* Kill more unused stuff.Jim Grosbach2010-11-121-43/+0
* Remove unused class.Jim Grosbach2010-11-121-8/+0
* Fill in the default predication bits for ARM unconditional branch.Jim Grosbach2010-11-121-0/+1
* Encoding for ARM LDRSB instructions.Jim Grosbach2010-11-121-7/+12
* Fix up a few more spots of addrmode2 (or not) changes that wereEric Christopher2010-11-121-6/+12
* Start of support for binary emit of 16-it Thumb instructions.Jim Grosbach2010-11-112-7/+18
* Fill out support for Thumb2 encodings of NEON instructions.Owen Anderson2010-11-113-0/+21
* Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4].Owen Anderson2010-11-113-1/+22
* Revert the accidental commit I made reverting the previous commit.Eric Christopher2010-11-111-6/+7
* ARM fixup encoding for direct call instructions (BL).Jim Grosbach2010-11-111-8/+22
* Revert this temporarily.Eric Christopher2010-11-115-104/+31
* Change the prologue and epilogue to use push/pop for the low ARM registers.Eric Christopher2010-11-114-25/+97
* Add support for Thumb2 encodings of NEON data processing instructions, using ...Owen Anderson2010-11-113-0/+26
* Encoding of destination fixup for ARM branch and conditional branchJim Grosbach2010-11-115-13/+57
* Encoding for ARM LDRSH_POST.Jim Grosbach2010-11-114-7/+39
* Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names.Jim Grosbach2010-11-112-39/+49
* Fix encoding of Ra register for ARM smla* instructions.Jim Grosbach2010-11-111-6/+6
* ARM STRH encoding information.Jim Grosbach2010-11-114-11/+44
* Move LDM predicate operand encoding into base clase. Add STM missing STMJim Grosbach2010-11-102-10/+18
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