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* Continue factoring computeOperandLatency. Use it for ARM hasHighOperandLatency.Andrew Trick2012-06-071-1/+2
* ARM getOperandLatency rewrite.Andrew Trick2012-06-071-85/+112
* ARM getOperandLatency should return -1 for unknown, consistent with APIAndrew Trick2012-06-071-1/+4
* Fix ARM getInstrLatency logic to work with the current API.Andrew Trick2012-06-071-13/+19
* Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer2012-06-061-2/+0
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-061-2/+2
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-052-10/+14
* ARM itinerary properties.Andrew Trick2012-06-053-22/+10
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-051-3/+4
* Revert commit r157966Joel Jones2012-06-051-24/+0
* This change handles a another case for generating the bic instruction Joel Jones2012-06-041-0/+24
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-023-7/+7
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-4/+2
* [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0Chad Rosier2012-06-011-1/+1
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-013-250/+275
* ARM: support struct byval in llvmManman Ren2012-06-013-15/+279
* Avoid depending on list orders and register numbering.Jakob Stoklund Olesen2012-05-301-6/+9
* [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.Chad Rosier2012-05-301-0/+36
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-253-19/+21
* Make some opcode tables static and const. Allows code to avoid making copies ...Craig Topper2012-05-241-173/+219
* Mark a static array as const.Craig Topper2012-05-241-1/+1
* Mark a static table as const. Shrink opcode size in static tables to uint16_t...Craig Topper2012-05-241-14/+9
* [arm-fast-isel] Add support for non-global callee.Chad Rosier2012-05-231-7/+17
* ARMDisassembler.cpp: Fix utf8 char in comments.NAKAMURA Takumi2012-05-221-3/+3
* ARM: .end_data_region mismatch in Thumb2.Jim Grosbach2012-05-211-2/+5
* Thumb2: RSB source register should be rGRP not GPRnopc.Jim Grosbach2012-05-211-4/+4
* Use the right register class for LDRrs.Jakob Stoklund Olesen2012-05-201-1/+1
* Transfer memory operands to the right instruction.Jakob Stoklund Olesen2012-05-201-1/+1
* Refactor data-in-code annotations.Jim Grosbach2012-05-183-22/+40
* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-173-11/+54
* Remove incorrect pattern for ARM SMML instruction.Tim Northover2012-05-171-2/+1
* Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach2012-05-152-0/+3
* Fix use of uninitialized variable.David Blaikie2012-05-141-1/+1
* [fast-isel] Add support for selecting @llvm.trap().Chad Rosier2012-05-111-0/+4
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Min...Chad Rosier2012-05-111-12/+2
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-111-4/+21
* [fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier2012-05-111-2/+4
* The return type is an unsigned, not a bool.Chad Rosier2012-05-111-1/+1
* Add space before an open parenthesis in control flow statements.Manman Ren2012-05-111-2/+2
* Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga2012-05-112-0/+5
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-112-3/+9
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-111-27/+119
* Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren2012-05-101-118/+27
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-101-27/+118
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-076-7/+14
* Nuke a few dead remnants of the CBE.Jim Grosbach2012-05-051-27/+0
* Add a new target hook "predictableSelectIsExpensive".Benjamin Kramer2012-05-051-0/+3
* Tweak to the fix in r156212, as with the change in removing the shift theKevin Enderby2012-05-041-1/+1
* Fix a bug in the ARM disassembler for wide branch conditional instructionsKevin Enderby2012-05-041-1/+1
* Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits...Sebastian Pop2012-05-041-0/+1
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