| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| | * | Start getting ARM loads/address computation going. | Eric Christopher | 2010-08-23 | 1 | -0/+73 |
| | * | Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend and | Bob Wilson | 2010-08-20 | 2 | -20/+22 |
| | * | Fix loop conditionals (MO.isDef() asserts that it's a reg) and | Eric Christopher | 2010-08-20 | 1 | -1/+2 |
| | * | Add a couple of random comments. | Eric Christopher | 2010-08-20 | 1 | -0/+3 |
| | * | Better handling of offsets on frame index references. rdar://8277890 | Jim Grosbach | 2010-08-19 | 2 | -9/+65 |
| | * | Add Thumb1 support for virtual frame indices. | Jim Grosbach | 2010-08-19 | 3 | -132/+160 |
| | * | Silence warning. | Eric Christopher | 2010-08-19 | 1 | -1/+1 |
| | * | Add an AddOptionalDefs method and use it. | Eric Christopher | 2010-08-19 | 1 | -21/+64 |
| | * | Add the "isCompare" attribute to the defm instead of each individual instr. | Bill Wendling | 2010-08-19 | 1 | -3/+1 |
| | * | Remove extra header. | Eric Christopher | 2010-08-18 | 1 | -1/+0 |
| | * | Enable ARM base register reuse to local stack slot allocation. Whenever a new | Jim Grosbach | 2010-08-18 | 1 | -0/+69 |
| | * | Minor simplification. Gets rid of a needless temporary. | Bill Wendling | 2010-08-18 | 1 | -4/+3 |
| | * | Add hook for re-using virtual base registers for local stack slot access. | Jim Grosbach | 2010-08-18 | 2 | -0/+8 |
| | * | Expand ZERO_EXTEND operations for NEON vector types. | Bob Wilson | 2010-08-18 | 1 | -0/+1 |
| | * | Add materialization of virtual base registers for frame indices allocated into | Jim Grosbach | 2010-08-17 | 2 | -0/+47 |
| | * | Don't call tablegen'ed Predicate_* functions in the ARM target. | Jakob Stoklund Olesen | 2010-08-17 | 3 | -11/+15 |
| | * | 80 column cleanup. | Jim Grosbach | 2010-08-17 | 3 | -32/+37 |
| | * | Add hook to examine an instruction referencing a frame index to determine | Jim Grosbach | 2010-08-17 | 2 | -0/+42 |
| | * | explicitly handle no-op cases for clarity. Fixes clang warning. | Jim Grosbach | 2010-08-17 | 1 | -0/+3 |
| | * | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson | 2010-08-17 | 5 | -39/+69 |
| | * | fix emacs language spec's, patch by Edmund Grimley-Evans! | Chris Lattner | 2010-08-17 | 3 | -3/+3 |
| | * | Allow more cases of undef shuffle indices and add tests for them. | Bob Wilson | 2010-08-17 | 1 | -12/+22 |
| | * | Copy over some overridden MI wrappers for ARM fast-isel. This is where | Eric Christopher | 2010-08-17 | 1 | -1/+192 |
| | * | Make arm fast-isel possible to enable via command line. | Eric Christopher | 2010-08-17 | 1 | -1/+7 |
| | * | Ignore undef shuffle indices when checking for a VTRN shuffle. Radar 8290937. | Bob Wilson | 2010-08-16 | 1 | -0/+1 |
| | * | Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee | Bob Wilson | 2010-08-16 | 2 | -4/+8 |
| | * | Rename sat_shift operand to shift_imm, in preparation for using it for other | Bob Wilson | 2010-08-16 | 5 | -14/+17 |
| | * | Remove unused code. | Bob Wilson | 2010-08-16 | 1 | -5/+0 |
| | * | T2I_rbin_irs rr variant is for disassembly only, so don't provide a pattern. | Bob Wilson | 2010-08-14 | 1 | -1/+1 |
| | * | Add a Thumb2 t2RSBrr instruction for disassembly only. | Bob Wilson | 2010-08-13 | 1 | -5/+18 |
| | * | Temporarily disable tail calls on ARM to work around some linker problems. | Bob Wilson | 2010-08-13 | 1 | -0/+9 |
| | * | Move the Thumb2 SSAT and USAT optional shift operator out of the | Bob Wilson | 2010-08-13 | 2 | -39/+21 |
| | * | Refactor the code for disassembling Thumb2 saturate instructions along the | Bob Wilson | 2010-08-13 | 1 | -56/+39 |
| | * | Cleaned up the for-disassembly-only entries in the arm instruction table so that | Johnny Chen | 2010-08-12 | 6 | -48/+67 |
| | * | Make sure ARM constant island pass does not break up an IT block. If the spli... | Evan Cheng | 2010-08-12 | 1 | -3/+20 |
| | * | The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td | Johnny Chen | 2010-08-12 | 2 | -0/+9 |
| | * | MC/AsmParser: Push the burdon of emitting diagnostics about unmatched | Daniel Dunbar | 2010-08-12 | 1 | -2/+9 |
| | * | tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl', | Daniel Dunbar | 2010-08-12 | 1 | -2/+8 |
| | * | Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm. | Johnny Chen | 2010-08-11 | 3 | -9/+6 |
| | * | Move the ARM SSAT and USAT optional shift amount operand out of the | Bob Wilson | 2010-08-11 | 7 | -44/+75 |
| | * | cortex m4 has floating point support, but only single precision. | Jim Grosbach | 2010-08-11 | 4 | -2/+11 |
| | * | Consider this code snippet: | Bill Wendling | 2010-08-11 | 2 | -3/+51 |
| | * | Report error if codegen tries to instantiate a ARM target when the cpu does s... | Evan Cheng | 2010-08-11 | 4 | -2/+14 |
| | * | ArchV7M implies HW division instructions. | Evan Cheng | 2010-08-11 | 1 | -3/+3 |
| | * | ArchV6T2, V7A, and V7M implies Thumb2; Archv7A implies NEON. | Evan Cheng | 2010-08-11 | 1 | -11/+10 |
| | * | Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.) | Evan Cheng | 2010-08-11 | 2 | -32/+36 |
| | * | MC/ARM: Add basic support for handling predication by parsing it out of the m... | Daniel Dunbar | 2010-08-11 | 1 | -1/+44 |
| | * | MC/ARM: Split mnemonic on '.' characters. | Daniel Dunbar | 2010-08-11 | 1 | -3/+16 |
| | * | MC/ARM: Fill in ARMOperand::dump a bit. | Daniel Dunbar | 2010-08-11 | 1 | -1/+21 |
| | * | MCAsmParser: Add dump() hook to MCParsedAsmOperand. | Daniel Dunbar | 2010-08-11 | 1 | -0/+2 |
