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* Another todo entry.Evan Cheng2009-07-091-0/+5
* Initial support for load / store multiple opt pass Thumb2 support (post-alloc...Evan Cheng2009-07-091-55/+158
* Fix ldm / stm unified syntax; add t2LDM_RET.Evan Cheng2009-07-091-2/+12
* LDM_RET should be marked mayLoad.Evan Cheng2009-07-091-1/+1
* Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. A...Evan Cheng2009-07-093-3/+22
* Add a Thumb readme entry.Evan Cheng2009-07-091-0/+6
* Correct comment.Evan Cheng2009-07-091-1/+1
* Handle Thumb-2 addressing modes during FP elimination.David Goodwin2009-07-091-0/+13
* Thread LLVMContext through MVT and related parts of SDISel.Owen Anderson2009-07-091-4/+5
* Reorg includes.Evan Cheng2009-07-092-2/+1
* Use common code for both ARM and Thumb-2 instruction and register info.David Goodwin2009-07-0812-1121/+97
* - Add some NEON ld / st instruction static encoding.Evan Cheng2009-07-082-4/+38
* Change how so_imm and t2_so_imm are handled. At instruction selection time, t...Evan Cheng2009-07-089-111/+48
* Missed an exit during the conversion.Edwin Török2009-07-081-4/+4
* Implement changes from Chris's feedback.Edwin Török2009-07-087-14/+19
* Implement NEON vst1 instruction.Bob Wilson2009-07-081-0/+22
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-0812-63/+80
* Fix cmake build.Xerxes Ranby2009-07-081-0/+1
* Push methods into base class in preparation for sharing.David Goodwin2009-07-088-598/+605
* Implement NEON vld1 instructions.Bob Wilson2009-07-083-1/+31
* Start converting to new error handling API.Edwin Török2009-07-088-46/+41
* Start breaking out common base functionality for register info.David Goodwin2009-07-084-916/+979
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-0811-1115/+1412
* Remove the vicmp and vfcmp instructions. Because we never had a release withNick Lewycky2009-07-081-1/+1
* Add a Thumb2 instruction flag to that indicates whether the instruction can b...Evan Cheng2009-07-083-14/+26
* Add a todo.Evan Cheng2009-07-082-1/+9
* Also statically set bit 25 for BR_JT instructions.Evan Cheng2009-07-071-3/+3
* Statically encode bit 25 to indicate immediate form of data processing instru...Evan Cheng2009-07-072-14/+37
* Add Thumb2 movcc instructions.Evan Cheng2009-07-072-35/+82
* Add BX and BXr9 encodings. Patch by Sean Callanan.Evan Cheng2009-07-071-2/+10
* Add Thumb2 pkhbt / pkhtb.Evan Cheng2009-07-071-4/+25
* Add some more Thumb2 multiplication instructions.Evan Cheng2009-07-073-11/+134
* 80 col violation.Evan Cheng2009-07-071-2/+2
* isThumb2 really should mean thumb2 only, not thumb2+.Evan Cheng2009-07-061-1/+1
* Add bfc to armv6t2.Evan Cheng2009-07-063-35/+48
* Added ARM::mls for armv6t2.Evan Cheng2009-07-061-0/+6
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-064-8/+51
* Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed ...Tilmann Scheller2009-07-031-1/+1
* Add thumb2 sign / zero extend with rotate instructions.Evan Cheng2009-07-032-1/+59
* Add Thumb2 load / store multiple instructions. Not used yet.Evan Cheng2009-07-031-0/+15
* t2LDR_PRE etc are loads.Evan Cheng2009-07-031-0/+2
* Added indexed stores.Evan Cheng2009-07-031-1/+45
* Sign extending pre/post indexed loads.Evan Cheng2009-07-022-2/+32
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...David Goodwin2009-07-0213-420/+1655
* CMake build fixes, from Xerxes RanbyDouglas Gregor2009-07-021-0/+2
* Thumb2 pre/post indexed loads.Evan Cheng2009-07-025-34/+204
* 80 col violation.Evan Cheng2009-07-021-2/+2
* Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, no...Evan Cheng2009-07-024-16/+17
* 80 col violation.Evan Cheng2009-07-021-1/+1
* Factor out ARM indexed load matching code.Evan Cheng2009-07-021-46/+57
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