| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update an insertion point iterator after replacing a return instruction with a | Cameron Zwarich | 2011-06-17 | 1 | -0/+1 |
| * | Explicitly invoke ArrayRef constructor to keep gcc happy. | Jakob Stoklund Olesen | 2011-06-17 | 1 | -12/+12 |
| * | Rename TRI::getAllocationOrder() to getRawAllocationOrder(). | Jakob Stoklund Olesen | 2011-06-16 | 2 | -42/+25 |
| * | Change the REG_SEQUENCE SDNode to take an explict register class ID as its fi... | Owen Anderson | 2011-06-16 | 1 | -12/+23 |
| * | Mark ldrexd/strexd w/ volatile memory by default | Bruno Cardoso Lopes | 2011-06-16 | 1 | -2/+2 |
| * | Revision r128665 added an optimization to make use of NEON multiplier | Chad Rosier | 2011-06-16 | 1 | -1/+1 |
| * | Use set operations instead of plain lists to enumerate register classes. | Jakob Stoklund Olesen | 2011-06-15 | 1 | -36/+17 |
| * | Another revsh pattern. rdar://9609059 | Evan Cheng | 2011-06-15 | 2 | -0/+8 |
| * | A minor simplification: no functional change. | Bob Wilson | 2011-06-15 | 1 | -7/+4 |
| * | PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff | Evan Cheng | 2011-06-15 | 1 | -4/+7 |
| * | Add an optimization that looks for a specific pair-wise add pattern and gener... | Tanya Lattner | 2011-06-14 | 1 | -5/+106 |
| * | Also recognize ARM v4t and v5e variants. | Evan Cheng | 2011-06-14 | 1 | -1/+7 |
| * | Add one more argument to the prefetch intrinsic to indicate whether it's a data | Bruno Cardoso Lopes | 2011-06-14 | 2 | -4/+8 |
| * | Clean up a few 80 column violations. | Jim Grosbach | 2011-06-13 | 6 | -40/+50 |
| * | Fix coordination for using R4 in Thumb1 as a scratch for SP restore. | Jim Grosbach | 2011-06-13 | 2 | -4/+9 |
| * | Provide an ARMCCState subclass of CCState so that ARM clients will always set | Cameron Zwarich | 2011-06-10 | 1 | -17/+29 |
| * | A CCState was being created without setting whether it is in the Call or Prol... | Cameron Zwarich | 2011-06-09 | 1 | -0/+1 |
| * | Add a parameter to CCState so that it can access the MachineFunction. | Eric Christopher | 2011-06-08 | 2 | -22/+22 |
| * | Fix for setjmp/longjmp exception handling on ARM. setjmp clobbers CPSR. | Andrew Trick | 2011-06-07 | 3 | -5/+5 |
| * | Make the Uv constraint a memory operand. This doesn't solve the | Eric Christopher | 2011-06-03 | 1 | -0/+3 |
| * | Add ARM fast-isel support for materializing the address of a global in cases ... | Eli Friedman | 2011-06-03 | 1 | -3/+17 |
| * | Have LowerOperandForConstraint handle multiple character constraints. | Eric Christopher | 2011-06-02 | 2 | -4/+8 |
| * | Flag unallocatable register classes instead of giving them empty | Jakob Stoklund Olesen | 2011-06-02 | 1 | -1/+3 |
| * | Fix encoding for VEXTdf. | Tanya Lattner | 2011-06-02 | 1 | -2/+3 |
| * | Use TRI::has{Sub,Super}ClassEq() where possible. | Jakob Stoklund Olesen | 2011-06-02 | 1 | -1/+1 |
| * | Don't hardcode the %reg format in the streamer. | Rafael Espindola | 2011-06-02 | 2 | -3/+3 |
| * | Fix ssat and ssat16 encodings for ARM and Thumb. The bit position value | Bruno Cardoso Lopes | 2011-05-31 | 4 | -8/+26 |
| * | Use the dwarf->llvm mapping to print register names in the cfi | Rafael Espindola | 2011-05-30 | 2 | -0/+5 |
| * | On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume. | John McCall | 2011-05-29 | 1 | -0/+1 |
| * | I didn't mean to commit these residues of a personal project. | John McCall | 2011-05-29 | 1 | -1/+0 |
| * | On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume. | John McCall | 2011-05-29 | 1 | -0/+1 |
| * | Fix ARM fast isel to correctly flag memory operands to stores. This fixes | Cameron Zwarich | 2011-05-28 | 1 | -5/+7 |
| * | Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs | Bruno Cardoso Lopes | 2011-05-28 | 4 | -5/+139 |
| * | This actually starts at offset 0, not 1. | Eric Christopher | 2011-05-28 | 1 | -1/+1 |
| * | Implement the 'M' output modifier for arm inline asm. This is fairly | Eric Christopher | 2011-05-28 | 1 | -2/+27 |
| * | Fix the remaining atomic intrinsics to use the right register classes on Thumb2, | Cameron Zwarich | 2011-05-27 | 1 | -10/+23 |
| * | ARM asm parser wasn't able to parse a "mov" instruction while in Thumb | Bruno Cardoso Lopes | 2011-05-27 | 1 | -3/+5 |
| * | Make size computation less brittle. | Rafael Espindola | 2011-05-27 | 2 | -43/+0 |
| * | Don't use movw / movt for iOS static codegen for now to workaround some tools... | Evan Cheng | 2011-05-27 | 1 | -1/+2 |
| * | Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 | Eli Friedman | 2011-05-27 | 1 | -0/+2 |
| * | Make the branch encoding for tBcc more obvious that it's a 4-byte opcode | Eric Christopher | 2011-05-27 | 2 | -1/+5 |
| * | Fix comment. | Eric Christopher | 2011-05-27 | 1 | -1/+1 |
| * | Reorganize these slightly according to operand type. | Eric Christopher | 2011-05-26 | 1 | -2/+2 |
| * | Mark tBX as an indirect branch rather than a return. | Cameron Zwarich | 2011-05-26 | 2 | -9/+9 |
| * | Rewrite fast-isel integer cast handling to handle more cases, and to be simpl... | Eli Friedman | 2011-05-25 | 1 | -1/+77 |
| * | Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions. | Cameron Zwarich | 2011-05-25 | 2 | -10/+24 |
| * | Clean up comment a bit. | Eric Christopher | 2011-05-25 | 1 | -2/+2 |
| * | Implement the 'm' modifier. Note that it only works for memory operands. | Eric Christopher | 2011-05-25 | 1 | -4/+14 |
| * | Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for ... | Eli Friedman | 2011-05-25 | 1 | -0/+4 |
| * | Restore an accidentally removed comment. | Cameron Zwarich | 2011-05-25 | 1 | -0/+1 |
