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path: root/lib/Target/CellSPU/SPUInstrInfo.td
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* Remove variable_ops from call instructions in most targets.Jakob Stoklund Olesen2012-07-131-2/+2
* Mark 'branch indirect' instruction as an indirect branch.Kalle Raiskila2011-10-131-2/+4
* Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.Kalle Raiskila2011-09-021-2/+2
* Allow vector shifts (shl,lshr,ashr) on SPU.Kalle Raiskila2011-03-041-48/+16
* Add branch hinting for SPU. Kalle Raiskila2011-02-281-2/+4
* Fix vector sign extend to put the source and destination types in theDavid Greene2011-01-311-3/+3
* Split up RotateShift itinerary in SPU.Kalle Raiskila2011-01-171-36/+36
* Add a "nop filler" pass to SPU.Kalle Raiskila2011-01-111-1/+1
* Handle lshr for i128 correctly on SPU also when Kalle Raiskila2010-11-291-2/+5
* Allow machine LICM to do its job on SPU.Kalle Raiskila2010-11-291-1/+1
* Allow for 'fcmp ogt' in SPU.Kalle Raiskila2010-11-241-2/+2
* Fix memory access lowering on SPU, addingKalle Raiskila2010-11-121-7/+24
* Zap some redundant 'ori $?, $?, 0' from SPU.Kalle Raiskila2010-10-011-2/+2
* Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.Kalle Raiskila2010-09-161-191/+81
* Remove all traces of v2[i,f]32 on SPU. Kalle Raiskila2010-08-181-70/+0
* Have SPU handle halfvec stores aligned by 8 bytes.Kalle Raiskila2010-08-091-0/+22
* Make SPU backend handle insertelement and Kalle Raiskila2010-08-041-0/+6
* More SPU v2f32 stuff added: insertelement and shuffle.Kalle Raiskila2010-08-021-0/+8
* Add preliminary v2f32 support for SPU. Like with v2i32, we justKalle Raiskila2010-08-021-66/+76
* Add preliminary v2i32 support for SPU backend. As there are noKalle Raiskila2010-08-021-1/+23
* Fix encoding of 'sf' and 'sfh' instructions.Kalle Raiskila2010-05-101-3/+3
* fix a typo, bitconvert from node to itself isn't valid.Chris Lattner2010-03-281-1/+1
* stop using vnot_convChris Lattner2010-03-281-3/+8
* remove some damaged sign extend patterns that can never match.Chris Lattner2010-03-191-8/+6
* do some serious surgery on CellSPU to get it back into a worldChris Lattner2010-03-151-30/+30
* disambiguate some types, add a fixme about some Chris Lattner2010-03-081-1/+1
* Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.Dan Gohman2009-11-231-8/+0
* Don't mark conditional branch instructions as control barriers.Dan Gohman2009-11-101-14/+16
* Major calling convention code refactoring.Dan Gohman2009-08-051-7/+0
* CellSPU:Scott Michel2009-03-171-14/+14
* CellSPU:Scott Michel2009-03-171-57/+48
* CellSPU:Scott Michel2009-03-161-78/+93
* CellSPU:Scott Michel2009-01-261-4/+3
* Untabify code.Scott Michel2009-01-261-12/+12
* CellSPU:Scott Michel2009-01-261-10/+20
* CellSPU:Scott Michel2009-01-211-42/+71
* - Convert remaining i64 custom lowering into custom instruction emissionScott Michel2009-01-151-22/+18
* CellSPU:Scott Michel2009-01-061-8/+18
* CellSPU:Scott Michel2009-01-061-35/+109
* CellSPU:Scott Michel2009-01-051-17/+25
* - Start moving target-dependent nodes that could be represented by anScott Michel2008-12-301-133/+145
* - Various '#if 0' cleanups.Scott Michel2008-12-291-77/+122
* - Remove Tilmann's custom truncate lowering: it completely hosed overScott Michel2008-12-271-175/+551
* CellSPU:Scott Michel2008-12-101-18/+38
* CellSPU: Fix bug 3055Scott Michel2008-12-041-0/+4
* CellSPU:Scott Michel2008-12-041-49/+0
* Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.Dan Gohman2008-12-031-1/+1
* CellSPU:Scott Michel2008-12-021-28/+0
* CellSPU:Scott Michel2008-12-011-53/+39
* CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby".Scott Michel2008-11-251-1/+1