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* Add more patterns to match in the integer comparison test harnesses.Scott Michel2008-03-203-9/+8
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-112-4/+4
* - Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.Scott Michel2008-03-101-9/+7
* Default ISD::PREFETCH to expand.Evan Cheng2008-03-101-1/+0
* Integer comparison tests for CellSPU.Scott Michel2008-03-104-75/+182
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-101-0/+3
* cell really does support cross-regclass moves, because R3 is in lots of diffe...Chris Lattner2008-03-091-4/+9
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ...Evan Cheng2008-03-081-0/+1
* Refine Cell's i64 constant generation code to cover more constants where theScott Michel2008-03-061-7/+28
* - Fix support for "special" i64 immediates that can be loadedScott Michel2008-03-054-647/+361
* Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ...Evan Cheng2008-02-281-1/+1
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-261-3/+3
* Merge current work back to tree to minimize diffs and drift. Major highlightsScott Michel2008-02-239-993/+1903
* Fix newly-introduced 4.3 warningsAnton Korobeynikov2008-02-203-8/+8
* I cannot find a libgcc function for this builtin. Therefor expanding it to a...Andrew Lenharth2008-02-161-1/+2
* Rewrite tblgen handling of subtarget features soDale Johannesen2008-02-141-0/+1
* Fix single precision FP constants on SPU. They are actually legal,Nate Begeman2008-02-143-20/+9
* Move some useful operands up into the all-targets .tdNate Begeman2008-02-141-3/+0
* Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBitsDan Gohman2008-02-132-2/+2
* don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. Chris Lattner2008-02-131-11/+3
* Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.Dan Gohman2008-02-132-8/+7
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-105-7/+9
* It's not always safe to fold movsd into xorpd, etc. Check the alignment of th...Evan Cheng2008-02-082-5/+8
* Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is co...Evan Cheng2008-02-051-2/+7
* Dwarf requires variable entries to be in the source order. Right now, since w...Evan Cheng2008-02-041-1/+0
* Get rid of the annoying blank lines before labels.Evan Cheng2008-02-021-1/+0
* SDIsel processes llvm.dbg.declare by recording the variable debug information...Evan Cheng2008-02-021-0/+1
* Add an extra operand to LABEL nodes which distinguishes between debug, EH, or...Evan Cheng2008-01-311-3/+3
* Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a prope...Evan Cheng2008-01-302-14/+0
* More cleanups for CellSPU:Scott Michel2008-01-3015-458/+389
* Factor the addressing mode and the load/store VT out of LoadSDNodeDan Gohman2008-01-301-2/+2
* Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel2008-01-298-680/+566
* Forward progress: crtbegin.c now compiles successfully!Scott Michel2008-01-174-149/+248
* This commit changes:Chris Lattner2008-01-171-3/+11
* rename SDTRet -> SDTNone.Chris Lattner2008-01-151-1/+1
* improve cygwin compatibility, patch by Sam BishopChris Lattner2008-01-121-1/+1
* More CellSPU refinements:Scott Michel2008-01-112-15/+36
* More CellSPU refinement and progress:Scott Michel2008-01-117-343/+370
* no need to explicitly clear these fields.Chris Lattner2008-01-071-1/+0
* remove MachineOpCode typedef.Chris Lattner2008-01-071-2/+2
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-074-59/+52
* rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner2008-01-061-1/+1
* Change the 'isStore' inferrer to look for 'SDNPMayStore' Chris Lattner2008-01-061-171/+169
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-014-201/+196
* Fix a problem where lib/Target/TargetInstrInfo.h would include and useChris Lattner2008-01-012-3/+2
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-313-37/+43
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-313-56/+44
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-303-8/+8
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewis...Chris Lattner2007-12-303-27/+26
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-2931-109/+76
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