| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too. | Juergen Ributzka | 2013-11-13 | 1 | -2/+5 |
| * | Refactor isInTailCallPosition handling | Tim Northover | 2013-08-06 | 1 | -0/+2 |
| * | The getRegForInlineAsmConstraint function should only accept MVT value types. | Chad Rosier | 2013-06-22 | 1 | -1/+1 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 | 1 | -3/+3 |
| * | Add LLVMContext argument to getSetCCResultType | Matt Arsenault | 2013-05-18 | 1 | -1/+1 |
| * | Hexagon: Use multiclass for Jump instructions. | Jyotsna Verma | 2013-05-01 | 1 | -1/+3 |
| * | Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE. | Tim Northover | 2013-04-20 | 1 | -1/+0 |
| * | Hexagon: Add support to lower block address. | Jyotsna Verma | 2013-03-07 | 1 | -0/+2 |
| * | reverting patch 176508. | Jyotsna Verma | 2013-03-05 | 1 | -2/+0 |
| * | Hexagon: Add support for lowering block address. | Jyotsna Verma | 2013-03-05 | 1 | -0/+2 |
| * | Hexagon: Add V4 combine instructions and some more Def Pats for V2. | Jyotsna Verma | 2013-02-04 | 1 | -0/+2 |
| * | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 | 1 | -1/+1 |
| * | Add patterns to define 'combine', 'tstbit', 'ct0/cl0' (count trailing/leading... | Jyotsna Verma | 2012-12-04 | 1 | -0/+9 |
| * | Sort includes for all of the .h files under the 'lib' tree. These were | Chandler Carruth | 2012-12-04 | 1 | -1/+1 |
| * | Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall | Justin Holewinski | 2012-05-25 | 1 | -7/+1 |
| * | Hexagon V5 FP Support. | Sirish Pande | 2012-05-10 | 1 | -0/+4 |
| * | Revert r155365, r155366, and r155367. All three of these have regression | Chandler Carruth | 2012-04-23 | 1 | -4/+0 |
| * | Hexagon V5 (floating point) support. | Sirish Pande | 2012-04-23 | 1 | -0/+4 |
| * | This reverts a long string of commits to the Hexagon backend. These | Chandler Carruth | 2012-04-18 | 1 | -4/+0 |
| * | Hexagon V5 (Floating Point) Support. | Sirish Pande | 2012-04-16 | 1 | -0/+4 |
| * | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper | 2012-03-17 | 1 | -1/+1 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 1 | -1/+1 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 1 | -1/+1 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 1 | -1/+1 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Hexagon backend support | Tony Linthicum | 2011-12-12 | 1 | -0/+162 |
