Commit message (Expand) | Author | Age | Files | Lines | |
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* | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper | 2012-03-17 | 1 | -1/+1 |
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
* | Optimize redundant sign extends and negation of predicates. | Sirish Pande | 2012-02-15 | 1 | -0/+1 |
* | Revert "Optimize redundant sign extends and negation of predicates" | Eric Christopher | 2012-02-15 | 1 | -1/+0 |
* | Optimize redundant sign extends and negation of predicates | Sirish Pande | 2012-02-15 | 1 | -0/+1 |
* | Use TSFlag bit to describe instruction properties. | Brendon Cahoon | 2012-02-08 | 1 | -0/+1 |
* | VLIW specific scheduler framework that utilizes deterministic finite automato... | Andrew Trick | 2012-02-01 | 1 | -0/+7 |
* | Hexagon backend support | Tony Linthicum | 2011-12-12 | 1 | -0/+166 |