external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	MIsched: Improve the interface to SchedDFS analysis (subtrees).	Andrew Trick	2013-01-25	1	-1/+7
*	Add indexed load/store instructions for offset validation check.	Jyotsna Verma	2013-01-17	1	-0/+4
*	Improve r172468: const_cast is not needed here	Dmitri Gribenko	2013-01-14	1	-3/+2
*	Fix Another Cast	David Greene	2013-01-14	1	-1/+2
*	Remove more unnecessary # operators with nothing to paste proceeding them.	Craig Topper	2013-01-07	2	-40/+40
*	Remove # from the beginning and end of def names. The # is a paste operator a...	Craig Topper	2013-01-07	2	-66/+66
*	Switch TargetTransformInfo from an immutable analysis pass that requires	Chandler Carruth	2013-01-07	2	-13/+1
*	Move all of the header files which are involved in modelling the LLVM IR	Chandler Carruth	2013-01-02	15	-30/+30
*	Remove Function::getParamAttributes and use the AttributeSet accessor methods...	Bill Wendling	2012-12-30	1	-1/+1
*	Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.	Jakub Staszak	2012-12-29	1	-0/+0
*	Add constant extender support to GP-relative load/store instructions.	Jyotsna Verma	2012-12-20	2	-44/+42
*	Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps.	Jyotsna Verma	2012-12-20	3	-40/+26
*	Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...	Bill Wendling	2012-12-19	1	-1/+1
*	Use multiclass for new-value store instructions with MEMri operand.	Jyotsna Verma	2012-12-11	1	-148/+46
*	[CMake] Update dependencies to intrinsics_gen corresponding to r169711.	NAKAMURA Takumi	2012-12-10	1	-2/+2
*	In hexagon convertToHardwareLoop, don't deref end() iterator	Matthew Curtis	2012-12-07	1	-7/+14
*	Define new-value store instructions with base+immediate addressing mode	Jyotsna Verma	2012-12-05	1	-128/+53
*	Use multiclass to define store instructions with base+immediate offset	Jyotsna Verma	2012-12-05	1	-138/+68
*	Fix misplaced closing brace.	Matthew Curtis	2012-12-05	1	-1/+2
*	Define store instructions with base+register offset addressing mode	Jyotsna Verma	2012-12-04	1	-352/+116
*	Add patterns to define 'combine', 'tstbit', 'ct0/cl0' (count trailing/leading...	Jyotsna Verma	2012-12-04	3	-17/+97
*	Add constant extender support to ALU32 instructions for V2.	Jyotsna Verma	2012-12-04	1	-51/+79
*	Sort includes for all of the .h files under the 'lib' tree. These were	Chandler Carruth	2012-12-04	8	-15/+15
*	Move all operand definitions into HexagonOperands.td	Jyotsna Verma	2012-12-04	2	-53/+57
*	Move generic Hexagon subtarget information into Hexagon.td	Jyotsna Verma	2012-12-04	2	-64/+101
*	Define store instructions with base+immediate offset addressing mode	Jyotsna Verma	2012-12-03	2	-185/+78
*	Define load instructions with base+immediate offset addressing mode	Jyotsna Verma	2012-12-03	1	-203/+73
*	Define unsigned const-ext predicates.	Jyotsna Verma	2012-12-03	1	-0/+128
*	Removing unnecessary 'else' statement from the predicates defined in HexagonO...	Jyotsna Verma	2012-12-03	1	-48/+12
*	Use the new script to sort the includes of every file under lib.	Chandler Carruth	2012-12-03	21	-118/+119
*	Define signed const-ext predicates.	Jyotsna Verma	2012-12-03	1	-0/+131
*	Use multiclass for the load instructions with MEMri operand.	Jyotsna Verma	2012-11-30	1	-184/+66
*	Use multiclass for the store instructions with MEMri operand.	Jyotsna Verma	2012-11-30	2	-163/+64
*	Use multiclass for the load instructions with 'base + register offset'	Jyotsna Verma	2012-11-30	1	-277/+97
*	Use multiclass for 'transfer' instructions.	Jyotsna Verma	2012-11-29	2	-80/+98
*	Define signed const-ext immediate operands and their predicates.	Jyotsna Verma	2012-11-28	2	-0/+122
*	Fix comments in HexagonOperands.td.	Jyotsna Verma	2012-11-26	1	-29/+27
*	Add new predicates for the immediate operands.	Jyotsna Verma	2012-11-21	1	-4/+121
*	Use one common 'let' expression to set PrintMethod for all immediate operands.	Jyotsna Verma	2012-11-21	1	-209/+53
*	Finish the renaming.	Rafael Espindola	2012-11-21	2	-2/+2
*	Renamed HexagonImmediates.td -> HexagonOperands.td.	Jyotsna Verma	2012-11-21	2	-1/+1
*	Removing some unused instruction definitions from the Hexagon backend.	Jyotsna Verma	2012-11-20	2	-92/+0
*	Added multiclass for post-increment load instructions.	Jyotsna Verma	2012-11-14	4	-233/+187
*	Test commit.	Jyotsna Verma	2012-11-13	1	-0/+1
*	ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.	Andrew Trick	2012-11-06	1	-2/+1
*	Use the relationship models infrastructure to add two relations - getPredOpcode	Pranav Bhandarkar	2012-11-01	3	-211/+139
*	Implement a basic VectorTargetTransformInfo interface to be used by the loop ...	Nadav Rotem	2012-10-24	1	-1/+1
*	Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerin...	Nadav Rotem	2012-10-18	2	-2/+14
*	Temporarily revert the TargetTransform changes.	Bob Wilson	2012-10-18	2	-14/+2
*	Add a new interface to allow IR-level passes to access codegen-specific infor...	Nadav Rotem	2012-10-10	2	-2/+14