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path: root/lib/Target/IA64/IA64RegisterInfo.td
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* make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.llChris Lattner2008-03-091-3/+5
* Final de-tabification.Bill Wendling2008-02-271-29/+28
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-331/+331
* Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner2006-08-171-8/+8
* Add dwarf register numbering to register data.Jim Laskey2006-03-241-169/+332
* fix stack corruption! Previously, 16-byte whole-FP-register stores wereDuraid Madina2006-01-261-4/+7
* fix register corruption! (my god.) r15 is a scratch reg, using that asDuraid Madina2006-01-231-4/+4
* use proper (82-bit) spills/fills when spilling FP regs, so thatDuraid Madina2006-01-171-1/+5
* update tablegen files - nothing to see hereDuraid Madina2005-12-221-2/+2
* Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman2005-12-011-3/+3
* add F0 and F1 to the FP register classDuraid Madina2005-11-021-3/+19
* DAG->DAG instruction selection for ia64! "hello world" works, not much else.Duraid Madina2005-10-281-4/+4
* Split RegisterClass 'Methods' into MethodProtos and MethodBodiesChris Lattner2005-08-191-4/+9
* Put register classes in namespacesChris Lattner2005-08-191-3/+3
* * OK, after changing to use liveIn/liveOut instead of IDEFs,Duraid Madina2005-04-121-5/+16
* Put out* into the allocation order, allowing the register allocator toChris Lattner2005-04-121-4/+3
* stop emitting IDEFs for args - change to using liveIn/liveOutDuraid Madina2005-04-121-2/+4
* ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)Duraid Madina2005-04-091-1/+6
* make sure 'special' registers don't get allocatedDuraid Madina2005-04-061-4/+13
* and so it begins...Duraid Madina2005-03-171-0/+291