Commit message (Expand) | Author | Age | Files | Lines | |
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* | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -3/+1 |
* | [mips] Define a function which returns the GPR register class. | Akira Hatanaka | 2013-03-29 | 1 | -0/+2 |
* | Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo | Eli Bendersky | 2013-02-21 | 1 | -4/+0 |
* | [mips] 80 columns. | Akira Hatanaka | 2013-01-04 | 1 | -1/+2 |
* | Turn on register scavenger for Mips 16 | Reed Kotler | 2012-12-20 | 1 | -0/+13 |
* | Implement ADJCALLSTACKUP and ADJCALLSTACKDOWN | Reed Kotler | 2012-10-31 | 1 | -1/+2 |
* | Remove unused private field to silence build warning. | Craig Topper | 2012-08-23 | 1 | -3/+1 |
* | Add a member of type Mips16InstrInfo/MipsSEInstrInfo to class | Akira Hatanaka | 2012-08-22 | 1 | -2/+4 |
* | Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emits | Akira Hatanaka | 2012-07-31 | 1 | -0/+3 |
* | Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and | Akira Hatanaka | 2012-07-31 | 1 | -0/+34 |