| Commit message (Expand) | Author | Age | Files | Lines |
* | [mips] Allow tail-call optimization for vararg functions and functions which | Akira Hatanaka | 2012-10-30 | 1 | -2/+3 |
* | Add definition of function MipsTargetLowering::passArgOnStack which emits nodes | Akira Hatanaka | 2012-10-30 | 1 | -0/+4 |
* | [mips] Do not tail-call optimize vararg functions or functions with byval | Akira Hatanaka | 2012-10-27 | 1 | -1/+2 |
* | Add method MipsTargetLowering::writeVarArgRegs which copies argument registers | Akira Hatanaka | 2012-10-27 | 1 | -0/+6 |
* | Add method MipsTargetLowering::passByValArg. | Akira Hatanaka | 2012-10-27 | 1 | -0/+8 |
* | Add method MipsTargetLowering::copyByValRegs. | Akira Hatanaka | 2012-10-27 | 1 | -0/+10 |
* | Add class MipsCC which provides methods used to analyze formal and call | Akira Hatanaka | 2012-10-26 | 1 | -0/+64 |
* | [mips] Add code to do tail call optimization. | Akira Hatanaka | 2012-10-19 | 1 | -0/+5 |
* | Add node and enum for mips tail call. | Akira Hatanaka | 2012-10-19 | 1 | -0/+3 |
* | Implement MipsTargetLowering::CanLowerReturn. | Akira Hatanaka | 2012-10-10 | 1 | -0/+6 |
* | MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field... | Akira Hatanaka | 2012-09-27 | 1 | -0/+2 |
* | MIPS DSP: add support for extract-word instructions. | Akira Hatanaka | 2012-09-27 | 1 | -0/+2 |
* | Add MIPS DSP register classes. Set actions of DSP vector operations and override | Akira Hatanaka | 2012-09-21 | 1 | -0/+10 |
* | SelectionDAG node enums for MIPS DSP nodes. | Akira Hatanaka | 2012-09-21 | 1 | -0/+41 |
* | Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering. | Akira Hatanaka | 2012-07-31 | 1 | -1/+0 |
* | Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC. | Akira Hatanaka | 2012-07-11 | 1 | -0/+1 |
* | Lower RETURNADDR node in Mips backend. | Akira Hatanaka | 2012-07-11 | 1 | -0/+1 |
* | Fix coding style violations. Remove white spaces and tabs. | Akira Hatanaka | 2012-06-14 | 1 | -1/+2 |
* | Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp. | Akira Hatanaka | 2012-06-13 | 1 | -0/+5 |
* | Define functions MipsTargetLowering::LowerLOAD and LowerSTORE which | Akira Hatanaka | 2012-06-02 | 1 | -0/+2 |
* | Define Mips specific unaligned load/store nodes. | Akira Hatanaka | 2012-06-02 | 1 | -1/+11 |
* | Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall | Justin Holewinski | 2012-05-25 | 1 | -7/+1 |
* | Expand 64-bit shifts if target ABI is O32. | Akira Hatanaka | 2012-05-09 | 1 | -0/+2 |
* | Add support for the 'I' inline asm constraint. Also add tests | Eric Christopher | 2012-05-07 | 1 | -0/+9 |
* | Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user. | Akira Hatanaka | 2012-04-11 | 1 | -0/+1 |
* | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper | 2012-03-17 | 1 | -2/+2 |
* | Lower SETCC nodes during legalization. Previously, it was lowered in DAG comb... | Akira Hatanaka | 2012-03-09 | 1 | -0/+1 |
* | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 | 1 | -1/+1 |
* | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 | 1 | -1/+1 |
* | remove blanks, and some code format | Jia Liu | 2012-02-28 | 1 | -1/+1 |
* | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 | 1 | -1/+1 |
* | Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is | Akira Hatanaka | 2012-02-03 | 1 | -0/+2 |
* | Rename WrapperPIC. It is now used for both pic and static. | Akira Hatanaka | 2011-12-09 | 1 | -1/+1 |
* | Implement 64-bit support for thread local storage handling. | Akira Hatanaka | 2011-12-08 | 1 | -7/+0 |
* | Make the type of shift amount i32 in order to reduce the number of shift | Akira Hatanaka | 2011-11-07 | 1 | -0/+2 |
* | Add variable IsO32 to MipsTargetLowering. | Akira Hatanaka | 2011-10-28 | 1 | -1/+1 |
* | Modify lowering of GlobalAddress so that correct code is emitted when target is | Akira Hatanaka | 2011-10-11 | 1 | -1/+1 |
* | Define variable HasMips64 in MipsTargetLowering. | Akira Hatanaka | 2011-09-26 | 1 | -1/+2 |
* | Add codegen support for vector select (in the IR this means a select | Duncan Sands | 2011-09-06 | 1 | -1/+1 |
* | Move pattern matching for EXT and INS to post-legalization DAGCombine per Bru... | Akira Hatanaka | 2011-08-17 | 1 | -2/+0 |
* | Add support for ext and ins. | Akira Hatanaka | 2011-08-17 | 1 | -1/+6 |
* | Define unaligned load and store. | Akira Hatanaka | 2011-08-12 | 1 | -0/+2 |
* | Code generation for 'fence' instruction. | Eli Friedman | 2011-07-27 | 1 | -0/+1 |
* | Lower memory barriers to sync instructions. | Akira Hatanaka | 2011-07-19 | 1 | -1/+4 |
* | Remove getRegClassForInlineAsmConstraint for Mips. | Eric Christopher | 2011-06-29 | 1 | -4/+0 |
* | Re-apply 132758 and 132768 which were speculatively reverted in 132777. | Akira Hatanaka | 2011-06-21 | 1 | -1/+3 |
* | Speculatively revert 132758 and 132768 to try to fix the Windows buildbots. | Eric Christopher | 2011-06-09 | 1 | -3/+1 |
* | Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the | Akira Hatanaka | 2011-06-08 | 1 | -1/+3 |
* | Custom-lower FRAMEADDR. Patch by Sasa Stankovic. | Akira Hatanaka | 2011-06-02 | 1 | -0/+1 |
* | This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor, | Bruno Cardoso Lopes | 2011-05-31 | 1 | -0/+10 |