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path: root/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
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* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-2/+82
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-14/+53
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-1/+2
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-12/+12
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-7/+8
* Update to LLVM 3.5a.Stephen Hines2014-04-241-42/+69
* [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code fo...Daniel Sanders2013-11-181-0/+5
* [mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. n...Daniel Sanders2013-11-121-0/+21
* [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. ...Daniel Sanders2013-10-301-10/+64
* [mips] Define a pseudo instruction which writes to both the lower and higherAkira Hatanaka2013-10-151-13/+0
* [mips] Rename isel nodes.Akira Hatanaka2013-10-151-1/+1
* [mips][msa] Added support for matching splati from normal IR (i.e. not intrin...Daniel Sanders2013-09-271-0/+10
* [mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_V...Daniel Sanders2013-09-241-0/+217
* Test commit to verify that commit access works.Zoran Jovanovic2013-09-131-1/+1
* [mips][msa] Added load/store intrinsics.Daniel Sanders2013-08-281-0/+14
* [mips][msa] Added move.vDaniel Sanders2013-08-281-0/+16
* [mips][msa] Added cfcmsa, and ctcmsaDaniel Sanders2013-08-281-0/+48
* [Mips] Support for unaligned load/store microMips instructionsJack Carter2013-08-131-0/+31
* [mips] Rename accumulator register classes and FP register operands.Akira Hatanaka2013-08-081-2/+2
* [mips] Delete register class HWRegs64.Akira Hatanaka2013-08-081-4/+2
* [mips] Rename register classes CPURegs and CPU64Regs.Akira Hatanaka2013-08-061-2/+2
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-1/+1
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-1/+1
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-4/+4
* [mips] Split the DSP control register and define one register for each field ofAkira Hatanaka2013-05-031-2/+33
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-191-2/+2
* [mips] Reapply r179420 and r179421.Akira Hatanaka2013-04-131-0/+2
* Revert r179420 and r179421.Akira Hatanaka2013-04-121-2/+0
* [mips] Instruction selection patterns for carry-setting and using addAkira Hatanaka2013-04-121-0/+2
* [mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selectsAkira Hatanaka2013-04-111-63/+0
* This patch enables llvm to switch between compiling for mips32/mips64 Reed Kotler2013-04-091-0/+5
* [mips] Fix definitions of multiply, multiply-add/sub and divide instructions.Akira Hatanaka2013-03-301-0/+13
* [mips] Define function MipsSEDAGToDAGISel::selectAddESubE.Akira Hatanaka2013-03-141-31/+28
* [mips] Rename functions and variables to start with proper case.Akira Hatanaka2013-03-141-22/+22
* [mips] Define two subclasses of MipsDAGToDAGISel. Mips16DAGToDAGISel is forAkira Hatanaka2013-03-141-0/+463
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