| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | This patch implements Mips load/store instructions from/to coprocessor 2. Tes... | Vladimir Medic | 2013-09-16 | 3 | -1/+60 |
| * | Expand the mask capability for deciding which functions are mips16 and mips32 | Reed Kotler | 2013-09-15 | 1 | -2/+3 |
| * | Fixed bug when generating Load Upper Immediate microMIPS instruction. | Zoran Jovanovic | 2013-09-14 | 2 | -2/+2 |
| * | Support for microMIPS DIV instructions. | Zoran Jovanovic | 2013-09-14 | 2 | -1/+5 |
| * | Support for misc microMIPS instructions. | Zoran Jovanovic | 2013-09-14 | 4 | -16/+74 |
| * | Test commit to verify that commit access works. | Zoran Jovanovic | 2013-09-13 | 1 | -1/+1 |
| * | Add an instruction deprecation feature to TableGen. | Joey Gouly | 2013-09-12 | 1 | -2/+8 |
| * | [mips][msa] Added support for matching mulv, nlzc, sll, sra, srl, and subv fr... | Daniel Sanders | 2013-09-11 | 2 | -24/+60 |
| * | [mips][msa] Added support for matching fadd, fdiv, flog2, fmul, frint, fsqrt,... | Daniel Sanders | 2013-09-11 | 2 | -16/+55 |
| * | [mips][msa] Added support for matching div_[su] from normal IR (i.e. not intr... | Daniel Sanders | 2013-09-11 | 2 | -9/+21 |
| * | [mips][msa] Added support for matching addv from normal IR (i.e. not intrinsics) | Daniel Sanders | 2013-09-11 | 2 | -8/+22 |
| * | [mips][msa] Separate the configuration of int/float vector types since they w... | Daniel Sanders | 2013-09-11 | 2 | -9/+25 |
| * | [mips][msa] Corrected the definition of the dotp_[su].[hwd] intrinsics | Daniel Sanders | 2013-09-11 | 1 | -13/+13 |
| * | Fix unused variables. | Eli Friedman | 2013-09-10 | 1 | -2/+0 |
| * | [mips][msa] Removed unsupported dot product instructions (dotp_[su].b) | Daniel Sanders | 2013-09-10 | 1 | -8/+0 |
| * | Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of ... | Vladimir Medic | 2013-09-10 | 1 | -0/+4 |
| * | Remove obsolete code from MipsAsmParser.cpp. | Vladimir Medic | 2013-09-10 | 1 | -22/+0 |
| * | [mips] When double precision loads and stores are split into two i32 loads and | Akira Hatanaka | 2013-09-09 | 1 | -3/+3 |
| * | Generate compact unwind encoding from CFI directives. | Bill Wendling | 2013-09-09 | 2 | -12/+20 |
| * | [mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double | Akira Hatanaka | 2013-09-07 | 6 | -74/+84 |
| * | [mips] Place parentheses around && to silence warning. | Akira Hatanaka | 2013-09-07 | 1 | -3/+3 |
| * | [mips] Add definition of instruction "drotr32" (double rotate right plus 32). | Akira Hatanaka | 2013-09-07 | 2 | -0/+5 |
| * | [mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit | Akira Hatanaka | 2013-09-07 | 6 | -46/+41 |
| * | [mips] Define "trap" as a pseudo instruction that turns into "break 0, 0". | Akira Hatanaka | 2013-09-06 | 2 | -3/+11 |
| * | [mips] Delete unused classes and defs. | Akira Hatanaka | 2013-09-06 | 1 | -9/+1 |
| * | [mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, wh... | Akira Hatanaka | 2013-09-06 | 4 | -16/+13 |
| * | [mips] Set instruction itineraries of loads, stores and conditional moves. | Akira Hatanaka | 2013-09-06 | 3 | -33/+35 |
| * | [mips][msa] Indentation | Daniel Sanders | 2013-09-06 | 1 | -34/+34 |
| * | [mips][msa] Requires<[HasMSA]> is redundant, it is also supplied via inheritance | Daniel Sanders | 2013-09-06 | 1 | -628/+628 |
| * | This patch adds support for microMIPS Multiply and Add/Sub instructions. Test... | Vladimir Medic | 2013-09-06 | 2 | -5/+11 |
| * | [mips][msa] Made the operand register sets optional for the VEC formats | Daniel Sanders | 2013-09-06 | 1 | -16/+9 |
| * | This patch adds support for microMIPS Move to/from HI/LO instructions. Test c... | Vladimir Medic | 2013-09-06 | 4 | -8/+44 |
| * | [mips][msa] Made the operand register sets optional for the ELM_INSVE formats | Daniel Sanders | 2013-09-06 | 1 | -14/+10 |
| * | [mips][msa] Made the operand register sets optional for the 3RF_4RF format | Daniel Sanders | 2013-09-06 | 1 | -14/+14 |
| * | This patch adds support for microMIPS Move Conditional instructions. Test cas... | Vladimir Medic | 2013-09-06 | 4 | -8/+33 |
| * | [mips][msa] Made the operand register sets optional for the 3RF formats | Daniel Sanders | 2013-09-06 | 1 | -132/+72 |
| * | [mips][msa] Made the operand register sets optional for the 3R_4R format | Daniel Sanders | 2013-09-06 | 1 | -30/+22 |
| * | This patch adds support for microMIPS disassembler and disassembler make chec... | Vladimir Medic | 2013-09-06 | 2 | -17/+93 |
| * | [mips][msa] Made the operand register sets optional for the 2RF format | Daniel Sanders | 2013-09-06 | 1 | -59/+39 |
| * | [mips][msa] Made the operand register sets optional for the I8 format | Daniel Sanders | 2013-09-06 | 1 | -21/+12 |
| * | [mips][msa] Made the operand register sets optional for the I5 and SI5 formats | Daniel Sanders | 2013-09-06 | 1 | -74/+46 |
| * | [mips][msa] Made the operand register sets optional for the BIT_[BHWD] formats | Daniel Sanders | 2013-09-06 | 1 | -104/+60 |
| * | [mips][msa] Sorted MSA_BIT_[BHWD]_DESC_BASE into ascending order of element size | Daniel Sanders | 2013-09-06 | 1 | -16/+16 |
| * | [mips][msa] Made the operand register sets optional for the 3R format | Daniel Sanders | 2013-09-06 | 1 | -460/+280 |
| * | [mips][msa] Made the InstrItinClass argument optional since it is always NoIt... | Daniel Sanders | 2013-09-06 | 1 | -600/+607 |
| * | Make sure we don't generate stubs for any of these functions because they | Reed Kotler | 2013-09-01 | 1 | -2/+21 |
| * | Fix a problem with dual mips16/mips32 mode. When the underlying processor | Reed Kotler | 2013-08-30 | 5 | -5/+30 |
| * | [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v | Daniel Sanders | 2013-08-28 | 6 | -2/+225 |
| * | [mips][msa] Added load/store intrinsics. | Daniel Sanders | 2013-08-28 | 8 | -21/+182 |
| * | [mips][msa] Added move.v | Daniel Sanders | 2013-08-28 | 2 | -0/+28 |
