| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix CMake build | Oscar Fuentes | 2011-07-21 | 1 | -0/+1 |
| * | Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir | Bruno Cardoso Lopes | 2011-07-21 | 9 | -3/+519 |
| * | - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. | Evan Cheng | 2011-07-20 | 3 | -8/+13 |
| * | Change name of class. | Akira Hatanaka | 2011-07-20 | 1 | -23/+23 |
| * | Define classes for definitions of atomic instructions. | Akira Hatanaka | 2011-07-20 | 1 | -106/+42 |
| * | Lower memory barriers to sync instructions. | Akira Hatanaka | 2011-07-19 | 3 | -2/+28 |
| * | Change variable name. | Akira Hatanaka | 2011-07-19 | 1 | -3/+3 |
| * | Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or | Akira Hatanaka | 2011-07-19 | 1 | -13/+14 |
| * | Use descriptive variable names. | Akira Hatanaka | 2011-07-19 | 1 | -154/+177 |
| * | Fix comments. | Akira Hatanaka | 2011-07-19 | 1 | -10/+10 |
| * | Remove redundant instructions. | Akira Hatanaka | 2011-07-19 | 1 | -16/+12 |
| * | Separate code that modifies control flow from code that adds instruction to | Akira Hatanaka | 2011-07-19 | 1 | -18/+18 |
| * | Introduce MCCodeGenInfo, which keeps information that can affect codegen | Evan Cheng | 2011-07-19 | 3 | -18/+32 |
| * | Make EmitAtomic functions return the correct MachineBasicBlocks so that | Akira Hatanaka | 2011-07-19 | 1 | -22/+28 |
| * | Do not insert instructions in reverse order. | Akira Hatanaka | 2011-07-19 | 1 | -14/+16 |
| * | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng | 2011-07-18 | 4 | -12/+13 |
| * | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng | 2011-07-18 | 3 | -19/+11 |
| * | Do not treat atomic.load.sub differently than other atomic binary intrinsics. | Akira Hatanaka | 2011-07-18 | 1 | -12/+2 |
| * | Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from | Akira Hatanaka | 2011-07-18 | 3 | -85/+23 |
| * | Change destination register operands of SC instructions so that unique | Akira Hatanaka | 2011-07-18 | 1 | -8/+13 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 2 | -4/+4 |
| * | Move some parts of TargetAsmInfo down to MCAsmInfo. This is not the greatest | Evan Cheng | 2011-07-15 | 1 | -0/+6 |
| * | Rename createAsmInfo to createMCAsmInfo and move registration code to MCTarge... | Evan Cheng | 2011-07-14 | 6 | -8/+13 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 10 | -39/+111 |
| * | - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo | Evan Cheng | 2011-07-11 | 2 | -2/+13 |
| * | Change createAsmParser to take a MCSubtargetInfo instead of triple, | Evan Cheng | 2011-07-09 | 1 | -0/+13 |
| * | Add an intrinsic and codegen support for fused multiply-accumulate. The intent | Cameron Zwarich | 2011-07-08 | 1 | -0/+2 |
| * | Silence compiler warning. | Benjamin Kramer | 2011-07-08 | 1 | -0/+2 |
| * | Eliminate asm parser's dependency on TargetMachine: | Evan Cheng | 2011-07-08 | 2 | -2/+3 |
| * | Raise assertion when MachineOperand has unexpected target flag. | Akira Hatanaka | 2011-07-08 | 1 | -1/+2 |
| * | Make sure variable Kind is assigned a value to suppress warning. | Akira Hatanaka | 2011-07-08 | 1 | -1/+1 |
| * | Lower MachineInstr to MC Inst and print to .s files. | Akira Hatanaka | 2011-07-07 | 13 | -107/+290 |
| * | Remove unnecessary newline. | Akira Hatanaka | 2011-07-07 | 1 | -1/+1 |
| * | Rather than having printMemOperand change the way memory operands are printed | Akira Hatanaka | 2011-07-07 | 3 | -16/+21 |
| * | Define class MipsMCInstLower. | Akira Hatanaka | 2011-07-07 | 3 | -0/+161 |
| * | Change visibility of MipsAsmPrinter. | Akira Hatanaka | 2011-07-07 | 2 | -60/+87 |
| * | Define class MipsMCSymbolRefExpr. | Akira Hatanaka | 2011-07-07 | 3 | -0/+126 |
| * | Simplify MipsRegisterInfo::eliminateFrameIndex. | Akira Hatanaka | 2011-07-07 | 1 | -33/+13 |
| * | Reverse order of operands of address operand mem so that the base operand comes | Akira Hatanaka | 2011-07-07 | 7 | -50/+50 |
| * | Add missing return statement. | Akira Hatanaka | 2011-07-07 | 1 | -1/+3 |
| * | Compute feature bits at time of MCSubtargetInfo initialization. | Evan Cheng | 2011-07-07 | 2 | -3/+4 |
| * | Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. | Evan Cheng | 2011-07-01 | 4 | -4/+4 |
| * | Rename TargetSubtarget to TargetSubtargetInfo for consistency. | Evan Cheng | 2011-07-01 | 2 | -3/+3 |
| * | - Added MCSubtargetInfo to capture subtarget features and scheduling | Evan Cheng | 2011-07-01 | 2 | -1/+13 |
| * | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 2 | -3/+6 |
| * | Improve Mips back-end's handling of DBG_VALUE. | Akira Hatanaka | 2011-07-01 | 5 | -23/+70 |
| * | Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to | Evan Cheng | 2011-06-30 | 4 | -13/+17 |
| * | Update comment for getRegForInlineAsmConstraint for Mips. | Eric Christopher | 2011-06-29 | 1 | -3/+3 |
| * | Remove getRegClassForInlineAsmConstraint for Mips. | Eric Christopher | 2011-06-29 | 2 | -48/+3 |
| * | Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries)... | Evan Cheng | 2011-06-29 | 1 | -2/+1 |
