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* Remove unnecessary newline.Akira Hatanaka2011-07-071-1/+1
* Rather than having printMemOperand change the way memory operands are printedAkira Hatanaka2011-07-073-16/+21
* Define class MipsMCInstLower.Akira Hatanaka2011-07-073-0/+161
* Change visibility of MipsAsmPrinter.Akira Hatanaka2011-07-072-60/+87
* Define class MipsMCSymbolRefExpr.Akira Hatanaka2011-07-073-0/+126
* Simplify MipsRegisterInfo::eliminateFrameIndex.Akira Hatanaka2011-07-071-33/+13
* Reverse order of operands of address operand mem so that the base operand comesAkira Hatanaka2011-07-077-50/+50
* Add missing return statement.Akira Hatanaka2011-07-071-1/+3
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-072-3/+4
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-014-4/+4
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-012-3/+3
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-012-1/+13
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-012-3/+6
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-015-23/+70
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-304-13/+17
* Update comment for getRegForInlineAsmConstraint for Mips.Eric Christopher2011-06-291-3/+3
* Remove getRegClassForInlineAsmConstraint for Mips.Eric Christopher2011-06-292-48/+3
* Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries)...Evan Cheng2011-06-291-2/+1
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-282-3/+3
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-284-5/+7
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-283-9/+9
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-275-9/+9
* Change the chain input of nodes that load the address of a function. This changeAkira Hatanaka2011-06-241-4/+1
* Prevent generation of redundant addiu instructions that compute address of Akira Hatanaka2011-06-241-1/+2
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-243-6/+9
* Add A0 and A1 to the list of registers used for returning a value in order toAkira Hatanaka2011-06-211-2/+2
* Coding style fixes.Akira Hatanaka2011-06-211-28/+29
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-217-34/+93
* Silence warnings in non assert builds. Patch by David BlaikieBruno Cardoso Lopes2011-06-161-2/+2
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-18/+10
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-092-71/+5
* Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.Eric Christopher2011-06-097-92/+31
* Initial support for inline asm memory operand constraints.Akira Hatanaka2011-06-092-0/+28
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-22/+22
* Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of theAkira Hatanaka2011-06-085-31/+64
* Reorganize code in MipsTargetLowering::LowerCall to improve readability.Akira Hatanaka2011-06-081-38/+36
* Refactor MipsTargetLowering::EmitInstrWithCustomInserter.Akira Hatanaka2011-06-071-92/+90
* Put back removed line.Akira Hatanaka2011-06-071-0/+1
* Coding style fixes.Akira Hatanaka2011-06-073-44/+31
* Use tabs to separate opcode and operand strings.Akira Hatanaka2011-06-071-21/+21
* Add comments for wrapper node patterns in MipsInstrInfo.td.Akira Hatanaka2011-06-071-1/+10
* Add test case for C++ exception handling and fix the following mistakes in Mi...Akira Hatanaka2011-06-071-30/+60
* Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.Akira Hatanaka2011-06-021-16/+17
* Custom-lower FRAMEADDR. Patch by Sasa Stankovic.Akira Hatanaka2011-06-023-1/+17
* Fix uninitialized variables and silence warningsBruno Cardoso Lopes2011-05-311-2/+3
* This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,Bruno Cardoso Lopes2011-05-314-6/+664
* This patch implements the thread local storage. Implemented are GeneralBruno Cardoso Lopes2011-05-317-3/+144
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+5
* Remove the dwarf numbers from the D registers. They don't have dwarf numbersRafael Espindola2011-05-291-16/+16
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